diff options
| author | Caio Marcelo de Oliveira Filho <[email protected]> | 2019-04-05 16:07:16 -0700 |
|---|---|---|
| committer | Caio Marcelo de Oliveira Filho <[email protected]> | 2019-04-08 19:29:33 -0700 |
| commit | ef0339d5ea645390dd2ab8b6c328311fc945025a (patch) | |
| tree | f06a60af4bd5a4bd658916c583af69b4c27adfad /src/intel | |
| parent | fcbc5ccaae6e606e68199c838e23545b4283b788 (diff) | |
intel/fs: Use TEX_LOGICAL whenever implicit lod is supported
Make sure we include compute shaders that have a derivative group
defined.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 747529e72d8..e88cb3de9f2 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -5135,11 +5135,15 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) srcs[TEX_LOGICAL_SRC_COORD_COMPONENTS] = brw_imm_d(instr->coord_components); srcs[TEX_LOGICAL_SRC_GRAD_COMPONENTS] = brw_imm_d(lod_components); + bool shader_supports_implicit_lod = stage == MESA_SHADER_FRAGMENT || + (stage == MESA_SHADER_COMPUTE && + nir->info.cs.derivative_group != DERIVATIVE_GROUP_NONE); + enum opcode opcode; switch (instr->op) { case nir_texop_tex: - opcode = (stage == MESA_SHADER_FRAGMENT ? SHADER_OPCODE_TEX_LOGICAL : - SHADER_OPCODE_TXL_LOGICAL); + opcode = shader_supports_implicit_lod ? + SHADER_OPCODE_TEX_LOGICAL : SHADER_OPCODE_TXL_LOGICAL; break; case nir_texop_txb: opcode = FS_OPCODE_TXB_LOGICAL; |