summaryrefslogtreecommitdiffstats
path: root/src/intel
diff options
context:
space:
mode:
authorJordan Justen <[email protected]>2018-03-28 01:29:18 -0700
committerJordan Justen <[email protected]>2018-10-11 15:16:00 -0700
commitd18a0d955eb307e242cbb32134849bb95a88ecb6 (patch)
treefbd66495f9e207b14254105fc5ec063c00c8e0a7 /src/intel
parentd7e0d47b9de3e759d5ed7b299fa7f4e7cbd8760e (diff)
anv/gen9+: Initialize new fields in STATE_BASE_ADDRESS
Ref: 263b584d5e4 "i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake." Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index c3a7e5c83c3..43a02f22567 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -122,6 +122,18 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
sba.InstructionBufferSize = 0xfffff;
sba.InstructionBuffersizeModifyEnable = true;
# endif
+# if (GEN_GEN >= 9)
+ sba.BindlessSurfaceStateBaseAddress = (struct anv_address) { NULL, 0 };
+ sba.BindlessSurfaceStateMemoryObjectControlState = GENX(MOCS);
+ sba.BindlessSurfaceStateBaseAddressModifyEnable = true;
+ sba.BindlessSurfaceStateSize = 0;
+# endif
+# if (GEN_GEN >= 10)
+ sba.BindlessSamplerStateBaseAddress = (struct anv_address) { NULL, 0 };
+ sba.BindlessSamplerStateMemoryObjectControlState = GENX(MOCS);
+ sba.BindlessSamplerStateBaseAddressModifyEnable = true;
+ sba.BindlessSamplerStateBufferSize = 0;
+# endif
}
/* After re-setting the surface state base address, we have to do some