nir: move brw_nir_rewrite_image_intrinsic into common code

Signed-off-by: Karol Herbst <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>

2 files changed, 1 insertions, 42 deletions

diff --git a/src/intel/compiler/brw_nir_lower_image_load_store.c b/src/intel/compiler/brw_nir_lower_image_load_store.c
index 2abebceb2d1..48b98bc57bd 100644
--- a/src/intel/compiler/brw_nir_lower_image_load_store.c
+++ b/src/intel/compiler/brw_nir_lower_image_load_store.c
@@ -801,44 +801,3 @@ brw_nir_lower_image_load_store(nir_shader *shader,
 
    return progress;
 }
-
-void
-brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,
-                                nir_ssa_def *index)
-{
-   nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
-   nir_variable *var = nir_deref_instr_get_variable(deref);
-
-   switch (intrin->intrinsic) {
-#define CASE(op) \
-   case nir_intrinsic_image_deref_##op: \
-      intrin->intrinsic = nir_intrinsic_image_##op; \
-      break;
-   CASE(load)
-   CASE(store)
-   CASE(atomic_add)
-   CASE(atomic_min)
-   CASE(atomic_max)
-   CASE(atomic_and)
-   CASE(atomic_or)
-   CASE(atomic_xor)
-   CASE(atomic_exchange)
-   CASE(atomic_comp_swap)
-   CASE(atomic_fadd)
-   CASE(size)
-   CASE(samples)
-   CASE(load_raw_intel)
-   CASE(store_raw_intel)
-#undef CASE
-   default:
-      unreachable("Unhanded image intrinsic");
-   }
-
-   nir_intrinsic_set_image_dim(intrin, glsl_get_sampler_dim(deref->type));
-   nir_intrinsic_set_image_array(intrin, glsl_sampler_type_is_array(deref->type));
-   nir_intrinsic_set_access(intrin, var->data.image.access);
-   nir_intrinsic_set_format(intrin, var->data.image.format);
-
-   nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
-                         nir_src_for_ssa(index));
-}
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 96e2e617d7d..1048da59c9e 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -292,7 +292,7 @@ lower_image_intrinsic(nir_intrinsic_instr *intrin,
    } else {
       unsigned binding_offset = state->set[set].surface_offsets[binding];
       index = nir_iadd(b, index, nir_imm_int(b, binding_offset));
-      brw_nir_rewrite_image_intrinsic(intrin, index);
+      nir_rewrite_image_intrinsic(intrin, index);
    }
 }