diff options
author | Lionel Landwerlin <[email protected]> | 2019-10-30 13:51:08 +0200 |
---|---|---|
committer | Lionel Landwerlin <[email protected]> | 2019-11-04 19:04:38 +0000 |
commit | ee6fbb95a74d0dfc00fe77778828c73e6a1447fb (patch) | |
tree | dfe02b1d85b118fb9bf5f877d35d16b9301283ff /src/intel | |
parent | ecc31d032e5fd2af208bb7764958ab4a16e51147 (diff) |
anv: Properly handle host query reset of performance queries
The host query reset entry point didn't use the availability offset
for performance queries.
To fix this, reorder the availability of performance queries to match
other queries.
Signed-off-by: Lionel Landwerlin <[email protected]>
Fixes: 2b5f30b1d9 ("anv: implement VK_INTEL_performance_query")
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/vulkan/genX_query.c | 52 |
1 files changed, 20 insertions, 32 deletions
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c index 10fe99d6914..4ff85f7ae66 100644 --- a/src/intel/vulkan/genX_query.c +++ b/src/intel/vulkan/genX_query.c @@ -94,12 +94,7 @@ VkResult genX(CreateQueryPool)( uint64s_per_slot += 4; break; case VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL: { - uint64s_per_slot = 2 * OA_REPORT_N_UINT64; /* begin & end OA reports */ - uint64s_per_slot += 4; /* PerfCounter 1 & 2 */ - uint64s_per_slot++; /* 2 * 32bit RPSTAT register */ - uint64s_per_slot++; /* 64bit marker */ - uint64s_per_slot++; /* availability */ - uint64s_per_slot = align_u32(uint64s_per_slot, 8); /* OA reports must be aligned to 64 bytes */ + uint64s_per_slot = 72; /* 576 bytes, see layout below */ break; } default: @@ -169,54 +164,51 @@ anv_query_address(struct anv_query_pool *pool, uint32_t query) } /** - * VK_INTEL_performance_query layout: + * VK_INTEL_performance_query layout (576 bytes) : * * ------------------------------ - * | end MI_RPC (256b) | + * | availability (8b) | * |----------------------------| - * | begin MI_RPC (256b) | + * | marker (8b) | + * |----------------------------| + * | begin RPSTAT register (4b) | + * |----------------------------| + * | end RPSTAT register (4b) | * |----------------------------| * | begin perfcntr 1 & 2 (16b) | * |----------------------------| * | end perfcntr 1 & 2 (16b) | * |----------------------------| - * | begin RPSTAT register (4b) | - * |----------------------------| - * | end RPSTAT register (4b) | + * | Unused (8b) | * |----------------------------| - * | marker (8b) | + * | begin MI_RPC (256b) | * |----------------------------| - * | availability (8b) | + * | end MI_RPC (256b) | * ------------------------------ */ static uint32_t -intel_perf_mi_rpc_offset(bool end) +intel_perf_marker_offset(void) { - return end ? 0 : 256; + return 8; } static uint32_t -intel_perf_counter(bool end) +intel_perf_rpstart_offset(bool end) { - uint32_t offset = 512; - offset += end ? 2 * sizeof(uint64_t) : 0; - return offset; + return 16 + (end ? sizeof(uint32_t) : 0); } static uint32_t -intel_perf_rpstart_offset(bool end) +intel_perf_counter(bool end) { - uint32_t offset = intel_perf_counter(false) + - 4 * sizeof(uint64_t); - offset += end ? sizeof(uint32_t) : 0; - return offset; + return 24 + (end ? (2 * sizeof(uint64_t)) : 0); } static uint32_t -intel_perf_marker_offset(void) +intel_perf_mi_rpc_offset(bool end) { - return intel_perf_rpstart_offset(false) + sizeof(uint64_t); + return 64 + (end ? 256 : 0); } static void @@ -241,11 +233,7 @@ query_slot(struct anv_query_pool *pool, uint32_t query) static bool query_is_available(struct anv_query_pool *pool, uint32_t query) { - if (pool->type == VK_QUERY_TYPE_PERFORMANCE_QUERY_INTEL) { - return *(volatile uint64_t *)((uint8_t *)query_slot(pool, query) + - pool->stride - 8); - } else - return *(volatile uint64_t *)query_slot(pool, query); + return *(volatile uint64_t *)query_slot(pool, query); } static VkResult |