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authorNanley Chery <[email protected]>2016-06-24 16:06:31 -0700
committerNanley Chery <[email protected]>2016-07-15 10:35:40 -0700
commit1fc739d28ee91c688c48901781a5198b6eb5833d (patch)
tree02949bd7a8cfb41904540220d3b69b57af9d83fc /src/intel
parente179fee049da7b880dfef6f71d2919f90b3dae4e (diff)
Revert "isl: Don't filter tiling flags if a specific tiling bit is set"
This reverts commit 091f1da902c71ac8d3d27b325a118e2f683f1ae5 . Although a user may specify a specfic tiling bit, ISL should still prevent incompatible tiling/surface combinations. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/isl/isl.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 48ff8ce15c5..75b81189788 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -223,14 +223,11 @@ isl_surf_choose_tiling(const struct isl_device *dev,
{
isl_tiling_flags_t tiling_flags = info->tiling_flags;
- /* Filter if multiple tiling options are given */
- if (!isl_is_pow2(tiling_flags)) {
- if (ISL_DEV_GEN(dev) >= 7) {
- gen7_filter_tiling(dev, info, &tiling_flags);
- } else {
- isl_finishme("%s: gen%u", __func__, ISL_DEV_GEN(dev));
- gen7_filter_tiling(dev, info, &tiling_flags);
- }
+ if (ISL_DEV_GEN(dev) >= 7) {
+ gen7_filter_tiling(dev, info, &tiling_flags);
+ } else {
+ isl_finishme("%s: gen%u", __func__, ISL_DEV_GEN(dev));
+ gen7_filter_tiling(dev, info, &tiling_flags);
}
#define CHOOSE(__tiling) \