diff options
| author | Jason Ekstrand <[email protected]> | 2016-06-07 17:01:56 -0700 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2016-06-22 12:26:43 -0700 |
| commit | a60ae9e10ab8cd22f80dc91ba29e27db17ab3372 (patch) | |
| tree | 17ee0986156d5c419cd406044c638b8364328879 /src/intel | |
| parent | 70c8afc0c892c2a3819ea01cf5b9467d80b4d7b5 (diff) | |
isl/state: Put pitch calculations together
This is purely cosmetic, but it makes things look a bit more readable.
Reviewed-by: Chad Versace <[email protected]>
Cc: "12.0" <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/isl/isl_surface_state.c | 42 |
1 files changed, 20 insertions, 22 deletions
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c index 0ada3e415a1..50570aa6b53 100644 --- a/src/intel/isl/isl_surface_state.c +++ b/src/intel/isl/isl_surface_state.c @@ -291,6 +291,26 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, s.SurfaceVerticalAlignment = valign; s.SurfaceHorizontalAlignment = halign; + if (info->surf->tiling == ISL_TILING_W) { + /* From the Broadwell PRM documentation for this field: + * + * "If the surface is a stencil buffer (and thus has Tile Mode set + * to TILEMODE_WMAJOR), the pitch must be set to 2x the value + * computed based on width, as the stencil buffer is stored with + * two rows interleaved." + */ + s.SurfacePitch = info->surf->row_pitch * 2 - 1; + } else { + s.SurfacePitch = info->surf->row_pitch - 1; + } + +#if GEN_GEN >= 8 + s.SurfaceQPitch = get_qpitch(info->surf) >> 2; +#elif GEN_GEN == 7 + s.SurfaceArraySpacing = info->surf->array_pitch_span == + ISL_ARRAY_PITCH_SPAN_COMPACT; +#endif + #if GEN_GEN >= 8 s.TileMode = isl_to_gen_tiling[info->surf->tiling]; #else @@ -299,11 +319,6 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, TILEWALK_YMAJOR; #endif -#if (GEN_GEN == 7) - s.SurfaceArraySpacing = info->surf->array_pitch_span == - ISL_ARRAY_PITCH_SPAN_COMPACT; -#endif - #if GEN_GEN >= 8 s.SamplerL2BypassModeDisable = true; #endif @@ -325,10 +340,6 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, s.CubeFaceEnables = 0x3f; #endif -#if GEN_GEN >= 8 - s.SurfaceQPitch = get_qpitch(info->surf) >> 2; -#endif - s.MultisampledSurfaceStorageFormat = isl_to_gen_multisample_layout[info->surf->msaa_layout]; s.NumberofMultisamples = ffs(info->surf->samples) - 1; @@ -349,19 +360,6 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state, s.MCSEnable = false; #endif - if (info->surf->tiling == ISL_TILING_W) { - /* From the Broadwell PRM documentation for this field: - * - * "If the surface is a stencil buffer (and thus has Tile Mode set - * to TILEMODE_WMAJOR), the pitch must be set to 2x the value - * computed based on width, as the stencil buffer is stored with - * two rows interleaved." - */ - s.SurfacePitch = info->surf->row_pitch * 2 - 1; - } else { - s.SurfacePitch = info->surf->row_pitch - 1; - } - #if GEN_GEN >= 8 /* From the CHV PRM, Volume 2d, page 321 (RENDER_SURFACE_STATE dword 0 * bit 9 "Sampler L2 Bypass Mode Disable" Programming Notes): |