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authorLionel Landwerlin <[email protected]>2018-07-31 10:48:37 +0100
committerLionel Landwerlin <[email protected]>2018-08-04 09:38:44 +0100
commit7471286bb092be24e4ad2555f9355075dfefe8b6 (patch)
tree9389a0bb439c11bd299ddbb156472317816267c9 /src/intel
parent35955afa7aa49906fad772b44d3e6357203430ae (diff)
intel: tools: aubwrite: reuse canonical address helper
Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/tools/aub_write.h19
1 files changed, 2 insertions, 17 deletions
diff --git a/src/intel/tools/aub_write.h b/src/intel/tools/aub_write.h
index 2e42e3d4009..b421679b9eb 100644
--- a/src/intel/tools/aub_write.h
+++ b/src/intel/tools/aub_write.h
@@ -29,6 +29,7 @@
#include <stdio.h>
#include "dev/gen_device_info.h"
+#include "common/gen_gem.h"
struct aub_ppgtt_table {
uint64_t phys_addr;
@@ -63,23 +64,7 @@ static inline void
aub_write_reloc(const struct gen_device_info *devinfo, void *p, uint64_t v)
{
if (devinfo->gen >= 8) {
- /* From the Broadwell PRM Vol. 2a,
- * MI_LOAD_REGISTER_MEM::MemoryAddress:
- *
- * "This field specifies the address of the memory
- * location where the register value specified in the
- * DWord above will read from. The address specifies
- * the DWord location of the data. Range =
- * GraphicsVirtualAddress[63:2] for a DWord register
- * GraphicsAddress [63:48] are ignored by the HW and
- * assumed to be in correct canonical form [63:48] ==
- * [47]."
- *
- * In practice, this will always mean the top bits are zero
- * because of the GTT size limitation of the aubdump tool.
- */
- const int shift = 63 - 47;
- *(uint64_t *)p = (((int64_t)v) << shift) >> shift;
+ *(uint64_t *)p = gen_canonical_address(v);
} else {
*(uint32_t *)p = v;
}