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authorMatt Turner <[email protected]>2017-06-14 14:48:11 -0700
committerMatt Turner <[email protected]>2017-10-20 15:00:17 -0700
commit9cd60fce9c22737000a8f8dc711141f8a523fe75 (patch)
tree6fe5f98dc1d229cf39817f241a58e38a7540df80 /src/intel
parent8c16c9c677087f0b4eb2160a28d0fbd66202df86 (diff)
i965/fs: Use align1 mode on ternary instructions on Gen10+
Align1 mode offers some nice features over align16, like access to more data types and the ability to use a 16-bit immediate. This patch does not start using any new features. It just emits ternary instructions in align1 mode. Reviewed-by: Scott D Phillips <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/compiler/brw_fs_generator.cpp12
1 files changed, 8 insertions, 4 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 2622a919173..bdf2f916cba 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1729,13 +1729,15 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
case BRW_OPCODE_MAD:
assert(devinfo->gen >= 6);
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ if (devinfo->gen < 10)
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_MAD(p, dst, src[0], src[1], src[2]);
break;
case BRW_OPCODE_LRP:
assert(devinfo->gen >= 6);
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ if (devinfo->gen < 10)
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_LRP(p, dst, src[0], src[1], src[2]);
break;
@@ -1833,7 +1835,8 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
case BRW_OPCODE_BFE:
assert(devinfo->gen >= 7);
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ if (devinfo->gen < 10)
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_BFE(p, dst, src[0], src[1], src[2]);
break;
@@ -1843,7 +1846,8 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
break;
case BRW_OPCODE_BFI2:
assert(devinfo->gen >= 7);
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ if (devinfo->gen < 10)
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_BFI2(p, dst, src[0], src[1], src[2]);
break;