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authorRafael Antognolli <[email protected]>2017-03-22 16:26:07 -0700
committerKenneth Graunke <[email protected]>2017-05-03 16:41:07 -0700
commit4266c372d9c2e33e50dd33dac30a6f0e3b1124ca (patch)
treeb342c53077af2e7c701eb00ec1df216fbc68fdd7 /src/intel
parentda299b7df3682bb7528caee07a56b03bc943a4c3 (diff)
genxml: 3DSTATE_VS rename Function Enable to Enable.
Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/blorp/blorp_genX_exec.h2
-rw-r--r--src/intel/genxml/gen6.xml2
-rw-r--r--src/intel/genxml/gen7.xml2
-rw-r--r--src/intel/genxml/gen75.xml2
-rw-r--r--src/intel/genxml/gen8.xml2
-rw-r--r--src/intel/genxml/gen9.xml2
-rw-r--r--src/intel/vulkan/genX_pipeline.c2
7 files changed, 7 insertions, 7 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 0bde2d2e844..bc829d026cb 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -432,7 +432,7 @@ blorp_emit_vs_config(struct blorp_batch *batch,
blorp_emit(batch, GENX(3DSTATE_VS), vs) {
if (vs_prog_data) {
- vs.FunctionEnable = true;
+ vs.Enable = true;
vs.KernelStartPointer = params->vs_prog_kernel;
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 14d643c9ca0..a12e22c1c1e 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1391,7 +1391,7 @@
<field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
<field name="Statistics Enable" start="170" end="170" type="bool"/>
<field name="Vertex Cache Disable" start="161" end="161" type="bool"/>
- <field name="Function Enable" start="160" end="160" type="bool"/>
+ <field name="Enable" start="160" end="160" type="bool"/>
</instruction>
<instruction name="3DSTATE_WM" bias="2" length="9">
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index e6b61b75852..2ac096eaa44 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1864,7 +1864,7 @@
<field name="Maximum Number of Threads" start="185" end="191" type="uint"/>
<field name="Statistics Enable" start="170" end="170" type="bool"/>
<field name="Vertex Cache Disable" start="161" end="161" type="bool"/>
- <field name="Function Enable" start="160" end="160" type="bool"/>
+ <field name="Enable" start="160" end="160" type="bool"/>
</instruction>
<instruction name="3DSTATE_WM" bias="2" length="3">
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index e63979c55be..6d2bfaa7522 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -2192,7 +2192,7 @@
<field name="Maximum Number of Threads" start="183" end="191" type="uint"/>
<field name="Statistics Enable" start="170" end="170" type="bool"/>
<field name="Vertex Cache Disable" start="161" end="161" type="bool"/>
- <field name="Function Enable" start="160" end="160" type="bool"/>
+ <field name="Enable" start="160" end="160" type="bool"/>
</instruction>
<instruction name="3DSTATE_WM" bias="2" length="3">
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 3b4440638d6..05e228c40e9 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2352,7 +2352,7 @@
<field name="Statistics Enable" start="234" end="234" type="bool"/>
<field name="SIMD8 Dispatch Enable" start="226" end="226" type="bool"/>
<field name="Vertex Cache Disable" start="225" end="225" type="bool"/>
- <field name="Function Enable" start="224" end="224" type="bool"/>
+ <field name="Enable" start="224" end="224" type="bool"/>
<field name="Vertex URB Entry Output Read Offset" start="277" end="282" type="uint"/>
<field name="Vertex URB Entry Output Length" start="272" end="276" type="uint"/>
<field name="User Clip Distance Clip Test Enable Bitmask" start="264" end="271" type="uint"/>
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index d78a321f4dc..191c74c7062 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -2585,7 +2585,7 @@
<field name="Statistics Enable" start="234" end="234" type="bool"/>
<field name="SIMD8 Dispatch Enable" start="226" end="226" type="bool"/>
<field name="Vertex Cache Disable" start="225" end="225" type="bool"/>
- <field name="Function Enable" start="224" end="224" type="bool"/>
+ <field name="Enable" start="224" end="224" type="bool"/>
<field name="Vertex URB Entry Output Read Offset" start="277" end="282" type="uint"/>
<field name="Vertex URB Entry Output Length" start="272" end="276" type="uint"/>
<field name="User Clip Distance Clip Test Enable Bitmask" start="264" end="271" type="uint"/>
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 2961d95b6b0..d862706e8b6 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1135,7 +1135,7 @@ emit_3dstate_vs(struct anv_pipeline *pipeline)
assert(anv_pipeline_has_stage(pipeline, MESA_SHADER_VERTEX));
anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VS), vs) {
- vs.FunctionEnable = true;
+ vs.Enable = true;
vs.StatisticsEnable = true;
vs.KernelStartPointer = vs_bin->kernel.offset;
#if GEN_GEN >= 8