intel/eu: Split brw_inst ex_desc accessors for SEND(C) vs. SENDS(C).

The brw_inst opcode accessors are going away in one of the following
commits.  We could potentially replace them with the new helpers that
do opcode remapping, but that would lead to a circular dependency
between brw_inst.h and brw_eu.h.  This way we also avoid ordering
issues that can cause the semantics of the ex_desc accessors to change
depending on whether the ex_desc field is set after or before the
opcode instruction field.

Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>

5 files changed, 46 insertions, 32 deletions

diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c
index 8b7047db00f..04a347a05f8 100644
--- a/src/intel/compiler/brw_disasm.c
+++ b/src/intel/compiler/brw_disasm.c
@@ -1732,7 +1732,7 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
                                 brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst));
          } else {
             has_imm_ex_desc = true;
-            imm_ex_desc = brw_inst_send_ex_desc(devinfo, inst);
+            imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst);
             fprintf(file, "0x%08"PRIx32, imm_ex_desc);
          }
       } else {
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 28254024bbc..c6b6561ee7b 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -2648,7 +2648,7 @@ brw_send_indirect_split_message(struct brw_codegen *p,
 
    if (ex_desc.file == BRW_IMMEDIATE_VALUE) {
       brw_inst_set_send_sel_reg32_ex_desc(devinfo, send, 0);
-      brw_inst_set_send_ex_desc(devinfo, send, ex_desc.ud);
+      brw_inst_set_sends_ex_desc(devinfo, send, ex_desc.ud);
    } else {
       assert(ex_desc.file == BRW_ARCHITECTURE_REGISTER_FILE);
       assert(ex_desc.nr == BRW_ARF_ADDRESS);
diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c
index 203280570aa..9b31b99ed2b 100644
--- a/src/intel/compiler/brw_eu_validate.c
+++ b/src/intel/compiler/brw_eu_validate.c
@@ -348,7 +348,7 @@ send_restrictions(const struct gen_device_info *devinfo,
 
          unsigned ex_mlen = 1;
          if (!brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) {
-            const uint32_t ex_desc = brw_inst_send_ex_desc(devinfo, inst);
+            const uint32_t ex_desc = brw_inst_sends_ex_desc(devinfo, inst);
             ex_mlen = brw_message_ex_desc_ex_mlen(devinfo, ex_desc);
          }
          const unsigned src0_reg_nr = brw_inst_src0_da_reg_nr(devinfo, inst);
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index 1d74f070b84..30faa6497aa 100644
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -528,21 +528,30 @@ brw_inst_set_send_ex_desc(const struct gen_device_info *devinfo,
                           brw_inst *inst, uint32_t value)
 {
    assert(devinfo->gen >= 9);
-   if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
-       brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC) {
-      brw_inst_set_bits(inst, 94, 91, GET_BITS(value, 31, 28));
-      brw_inst_set_bits(inst, 88, 85, GET_BITS(value, 27, 24));
-      brw_inst_set_bits(inst, 83, 80, GET_BITS(value, 23, 20));
-      brw_inst_set_bits(inst, 67, 64, GET_BITS(value, 19, 16));
-      assert(GET_BITS(value, 15, 0) == 0);
-   } else {
-      assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS ||
-             brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDSC);
-      brw_inst_set_bits(inst, 95, 80, GET_BITS(value, 31, 16));
-      assert(GET_BITS(value, 15, 10) == 0);
-      brw_inst_set_bits(inst, 67, 64, GET_BITS(value, 9, 6));
-      assert(GET_BITS(value, 5, 0) == 0);
-   }
+   brw_inst_set_bits(inst, 94, 91, GET_BITS(value, 31, 28));
+   brw_inst_set_bits(inst, 88, 85, GET_BITS(value, 27, 24));
+   brw_inst_set_bits(inst, 83, 80, GET_BITS(value, 23, 20));
+   brw_inst_set_bits(inst, 67, 64, GET_BITS(value, 19, 16));
+   assert(GET_BITS(value, 15, 0) == 0);
+}
+
+/**
+ * Set the SENDS(C) message extended descriptor immediate.
+ *
+ * This doesn't include the SFID nor the EOT field that were considered to be
+ * part of the extended message descriptor by some versions of the BSpec,
+ * because they are present in the instruction even if the extended message
+ * descriptor is provided indirectly in a register, so we want to specify them
+ * separately.
+ */
+static inline void
+brw_inst_set_sends_ex_desc(const struct gen_device_info *devinfo,
+                           brw_inst *inst, uint32_t value)
+{
+   brw_inst_set_bits(inst, 95, 80, GET_BITS(value, 31, 16));
+   assert(GET_BITS(value, 15, 10) == 0);
+   brw_inst_set_bits(inst, 67, 64, GET_BITS(value, 9, 6));
+   assert(GET_BITS(value, 5, 0) == 0);
 }
 
 /**
@@ -555,18 +564,23 @@ brw_inst_send_ex_desc(const struct gen_device_info *devinfo,
                       const brw_inst *inst)
 {
    assert(devinfo->gen >= 9);
-   if (brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SEND ||
-       brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC) {
-      return (brw_inst_bits(inst, 94, 91) << 28 |
-              brw_inst_bits(inst, 88, 85) << 24 |
-              brw_inst_bits(inst, 83, 80) << 20 |
-              brw_inst_bits(inst, 67, 64) << 16);
-   } else {
-      assert(brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDS ||
-             brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDSC);
-      return (brw_inst_bits(inst, 95, 80) << 16 |
-              brw_inst_bits(inst, 67, 64) << 6);
-   }
+   return (brw_inst_bits(inst, 94, 91) << 28 |
+           brw_inst_bits(inst, 88, 85) << 24 |
+           brw_inst_bits(inst, 83, 80) << 20 |
+           brw_inst_bits(inst, 67, 64) << 16);
+}
+
+/**
+ * Get the SENDS(C) message extended descriptor immediate.
+ *
+ * \sa brw_inst_set_send_ex_desc().
+ */
+static inline uint32_t
+brw_inst_sends_ex_desc(const struct gen_device_info *devinfo,
+                       const brw_inst *inst)
+{
+   return (brw_inst_bits(inst, 95, 80) << 16 |
+           brw_inst_bits(inst, 67, 64) << 6);
 }
 
 /**
diff --git a/src/intel/tools/i965_gram.y b/src/intel/tools/i965_gram.y
index 2b906a27503..ee2a1446694 100644
--- a/src/intel/tools/i965_gram.y
+++ b/src/intel/tools/i965_gram.y
@@ -962,7 +962,7 @@ sendinstruction:
 		if (brw_inst_send_sel_reg32_ex_desc(p->devinfo, brw_last_inst)) {
 			brw_inst_set_send_ex_desc_ia_subreg_nr(p->devinfo, brw_last_inst, $5.subnr);
 		} else {
-			brw_inst_set_send_ex_desc(p->devinfo, brw_last_inst, $8);
+			brw_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $8);
 		}
 
 		brw_inst_set_bits(brw_last_inst, 127, 96, $7);
@@ -988,7 +988,7 @@ sendinstruction:
 		brw_set_src1(p, brw_last_inst, $6);
 
 		brw_inst_set_send_sel_reg32_desc(p->devinfo, brw_last_inst, 1);
-		brw_inst_set_send_ex_desc(p->devinfo, brw_last_inst, $8);
+		brw_inst_set_sends_ex_desc(p->devinfo, brw_last_inst, $8);
 
 		brw_inst_set_sfid(p->devinfo, brw_last_inst, $9);
 		brw_inst_set_eot(p->devinfo, brw_last_inst, $10.end_of_thread);