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authorJason Ekstrand <[email protected]>2017-09-06 18:33:38 -0700
committerJason Ekstrand <[email protected]>2017-10-25 16:14:09 -0700
commitfa6e74e33e5bc5f6fba8f9de76b8b059515e708f (patch)
tree93b60d1c7fbddacfab4d13ac3735cb3b43c00e2c /src/intel
parenta6d38f476beaaf0a9677cfc168172121b5779570 (diff)
intel/fs: Handle flag read/write aliasing in needs_src_copy
In order to implement the ballot intrinsic, we do a MOV from flag register to some GRF. If that GRF is used in a SEL, cmod propagation helpfully changes it into a MOV from the flag register with a cmod. This is perfectly valid but when lower_simd_width comes along, it simply splits into two instructions which both have conditional modifiers. This is a problem since we're reading the flag register. This commit makes us check whether or not flags_written() overlaps with the flag values that we are reading via the instruction source and, if we have any interference, will force us to emit a copy of the source. Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/compiler/brw_fs.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 30e8841242d..4616529abcf 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -5013,7 +5013,9 @@ needs_src_copy(const fs_builder &lbld, const fs_inst *inst, unsigned i)
{
return !(is_periodic(inst->src[i], lbld.dispatch_width()) ||
(inst->components_read(i) == 1 &&
- lbld.dispatch_width() <= inst->exec_size));
+ lbld.dispatch_width() <= inst->exec_size)) ||
+ (inst->flags_written() &
+ flag_mask(inst->src[i], type_sz(inst->src[i].type)));
}
/**