diff options
author | Anuj Phogat <[email protected]> | 2016-10-03 10:40:34 -0700 |
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committer | Anuj Phogat <[email protected]> | 2016-10-04 13:20:35 -0700 |
commit | d2112fc8d9ab1530c3265c5faac20bf906d1ddc8 (patch) | |
tree | edcc276994fe537e632121c656e98d3afbbaadec /src/intel | |
parent | 1ffcf95fc4a63c56471eeee268d1a973daa55d7a (diff) |
anv/gen7_pipeline: Fix typo in semicolon
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/vulkan/gen7_pipeline.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index d4d494f6210..82a467dcbe9 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -232,7 +232,7 @@ genX(graphics_pipeline_create)( wm_prog_data->base.dispatch_grf_start_reg, ps.DispatchGRFStartRegisterforConstantSetupData1 = 0, ps.DispatchGRFStartRegisterforConstantSetupData2 = - wm_prog_data->dispatch_grf_start_reg_2, + wm_prog_data->dispatch_grf_start_reg_2; /* Haswell requires the sample mask to be set in this packet as well as * in 3DSTATE_SAMPLE_MASK; the values should match. */ |