diff options
| author | Jason Ekstrand <[email protected]> | 2017-04-28 07:12:24 -0700 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2017-09-20 17:21:06 -0700 |
| commit | fc91cbe20ba580930bac06632e7a6d4ed39bc3ab (patch) | |
| tree | f6557eea44c7d124d5ab0b98726beb97e963736b /src/intel | |
| parent | 28911156711c661d42807aaaf89e33eeba53537e (diff) | |
spirv: Flip the tessellation winding order
It's not SPIR-V that's backwards from GLSL, it's Vulkan that's backwards
from GL. Let's make NIR consistent with the source language and do the
flipping inside the Vulkan driver instead.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 6dfa49b8737..844c11803c2 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -1217,7 +1217,18 @@ emit_3dstate_hs_te_ds(struct anv_pipeline *pipeline) anv_batch_emit(&pipeline->batch, GENX(3DSTATE_TE), te) { te.Partitioning = tes_prog_data->partitioning; - te.OutputTopology = tes_prog_data->output_topology; + + /* Vulkan has its winding order backwards from GL so TRI_CCW becomes + * TRI_CW and vice versa. + */ + if (tes_prog_data->output_topology == OUTPUT_TRI_CCW) { + te.OutputTopology = OUTPUT_TRI_CW; + } else if (tes_prog_data->output_topology == OUTPUT_TRI_CW) { + te.OutputTopology = OUTPUT_TRI_CCW; + } else { + te.OutputTopology = tes_prog_data->output_topology; + } + te.TEDomain = tes_prog_data->domain; te.TEEnable = true; te.MaximumTessellationFactorOdd = 63.0; |