diff options
author | Iago Toral Quiroga <[email protected]> | 2018-05-22 08:17:17 +0200 |
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committer | Juan A. Suarez Romero <[email protected]> | 2019-04-18 11:05:18 +0200 |
commit | e6b7410187dcd21de907c69273cc3d9a0b04dad5 (patch) | |
tree | a5834532a14d5ecf484c873d757b3e8199874be4 /src/intel | |
parent | ee049f6b717ea6e20cef38f16a8024276b181d17 (diff) |
intel/compiler: allow half-float on 3-source instructions since gen8
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r-- | src/intel/compiler/brw_eu_emit.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index d58919638d5..7bd3003864a 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -797,7 +797,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, assert(dest.type == BRW_REGISTER_TYPE_F || dest.type == BRW_REGISTER_TYPE_DF || dest.type == BRW_REGISTER_TYPE_D || - dest.type == BRW_REGISTER_TYPE_UD); + dest.type == BRW_REGISTER_TYPE_UD || + (dest.type == BRW_REGISTER_TYPE_HF && devinfo->gen >= 8)); if (devinfo->gen == 6) { brw_inst_set_3src_a16_dst_reg_file(devinfo, inst, dest.file == BRW_MESSAGE_REGISTER_FILE); |