diff options
| author | Anuj Phogat <[email protected]> | 2017-11-10 14:22:44 -0800 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2017-11-14 13:23:18 -0800 |
| commit | 5d8164c4287217c2a3f40f587899bb737811c328 (patch) | |
| tree | 486358d7302f59e5182fcf222b1e5e1738c3875a /src/intel | |
| parent | 72a239266b84033e539283d50ca0b3c50e630463 (diff) | |
anv/gen10: Enable float blend optimization
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/vulkan/genX_state.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c index f56c686ed33..54fb8634fdc 100644 --- a/src/intel/vulkan/genX_state.c +++ b/src/intel/vulkan/genX_state.c @@ -121,6 +121,18 @@ genX(init_device_state)(struct anv_device *device) } #endif +#if GEN_GEN == 10 + uint32_t cache_mode_ss; + anv_pack_struct(&cache_mode_ss, GENX(CACHE_MODE_SS), + .FloatBlendOptimizationEnable = true, + .FloatBlendOptimizationEnableMask = true); + + anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) { + lri.RegisterOffset = GENX(CACHE_MODE_SS_num); + lri.DataDWord = cache_mode_ss; + } +#endif + anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa); anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) { |