diff options
| author | Nanley Chery <[email protected]> | 2017-03-07 11:17:05 -0800 |
|---|---|---|
| committer | Nanley Chery <[email protected]> | 2017-03-20 09:43:44 -0700 |
| commit | 7c50f9903f58ef04ff393505a383d06f499f1fdc (patch) | |
| tree | 4ece2ce95847ba8ab4465526531da36f1e0995a0 /src/intel | |
| parent | f4b23589da8ad395b6d5bc968502d8128a8bd8c5 (diff) | |
intel: Correct the BDW surface state size
The PRMs state that this packet is 16 DWORDS long. Ensure that the last
three DWORDS are zeroed as required by the hardware when allocating a
null surface state.
Cc: <[email protected]>
Signed-off-by: Nanley Chery <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/isl/isl.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 6eb1e93efd9..b4bdf2059ac 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -56,7 +56,7 @@ static const struct { [5] = {24, 32, 4}, [6] = {24, 32, 4}, [7] = {32, 32, 4, 24}, - [8] = {52, 64, 32, 40}, + [8] = {64, 64, 32, 40}, [9] = {64, 64, 32, 40}, }; |