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authorJason Ekstrand <[email protected]>2016-11-12 12:13:17 -0800
committerJason Ekstrand <[email protected]>2016-11-16 10:09:16 -0800
commitd33e2ad67c3621a01648292ece2148aa8b7d2fdb (patch)
tree62f77b24375828225d9a70192ed91be45a922c0f /src/intel
parent8db6f2e6ebb9b41aadfa8becef2f948ce1b27568 (diff)
anv: Move INTERFACE_DESCRIPTOR_DATA setup to the pipeline
There are a few dynamic bits, namely binding table and sampler addresses, but most of it is static and really belongs in the pipeline. It certainly doesn't belong in flush_compute_descriptor_set. We'll use the same state merging trick we use for gen7 DEPTH_STENCIL. Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/vulkan/anv_private.h2
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c37
-rw-r--r--src/intel/vulkan/genX_pipeline.c26
3 files changed, 38 insertions, 27 deletions
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 24035f4a41f..3b96acda4f8 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1414,6 +1414,8 @@ struct anv_pipeline {
struct {
uint32_t wm_depth_stencil[4];
} gen9;
+
+ uint32_t interface_descriptor_data[8];
};
static inline bool
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index a77973cc28e..edf5f8eb539 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1338,7 +1338,6 @@ void genX(CmdDrawIndexedIndirect)(
static VkResult
flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
{
- struct anv_device *device = cmd_buffer->device;
struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
struct anv_state surfaces = { 0, }, samplers = { 0, };
VkResult result;
@@ -1352,9 +1351,6 @@ flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
struct anv_state push_state = anv_cmd_buffer_cs_push_constants(cmd_buffer);
- const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
- const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
-
if (push_state.alloc_size) {
anv_batch_emit(&cmd_buffer->batch, GENX(MEDIA_CURBE_LOAD), curbe) {
curbe.CURBETotalDataLength = push_state.alloc_size;
@@ -1362,31 +1358,18 @@ flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
}
}
- const uint32_t slm_size = encode_slm_size(GEN_GEN, prog_data->total_shared);
+ uint32_t iface_desc_data_dw[GENX(INTERFACE_DESCRIPTOR_DATA_length)];
+ struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = {
+ .BindingTablePointer = surfaces.offset,
+ .SamplerStatePointer = samplers.offset,
+ };
+ GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL, iface_desc_data_dw, &desc);
- const struct anv_shader_bin *cs_bin =
- pipeline->shaders[MESA_SHADER_COMPUTE];
struct anv_state state =
- anv_state_pool_emit(&device->dynamic_state_pool,
- GENX(INTERFACE_DESCRIPTOR_DATA), 64,
- .KernelStartPointer = cs_bin->kernel.offset,
- .BindingTablePointer = surfaces.offset,
- .BindingTableEntryCount = 0,
- .SamplerStatePointer = samplers.offset,
- .SamplerCount = 0,
-#if !GEN_IS_HASWELL
- .ConstantURBEntryReadOffset = 0,
-#endif
- .ConstantURBEntryReadLength =
- cs_prog_data->push.per_thread.regs,
-#if GEN_GEN >= 8 || GEN_IS_HASWELL
- .CrossThreadConstantDataReadLength =
- cs_prog_data->push.cross_thread.regs,
-#endif
- .BarrierEnable = cs_prog_data->uses_barrier,
- .SharedLocalMemorySize = slm_size,
- .NumberofThreadsinGPGPUThreadGroup =
- cs_prog_data->threads);
+ anv_cmd_buffer_merge_dynamic(cmd_buffer, iface_desc_data_dw,
+ pipeline->interface_descriptor_data,
+ GENX(INTERFACE_DESCRIPTOR_DATA_length),
+ 64);
uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t);
anv_batch_emit(&cmd_buffer->batch,
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index a8df968f6b0..2cc5c7d4ef0 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1470,6 +1470,32 @@ compute_pipeline_create(
vfe.CURBEAllocationSize = vfe_curbe_allocation;
}
+ const struct anv_shader_bin *cs_bin =
+ pipeline->shaders[MESA_SHADER_COMPUTE];
+ struct GENX(INTERFACE_DESCRIPTOR_DATA) desc = {
+ .KernelStartPointer = cs_bin->kernel.offset,
+
+ .SamplerCount = get_sampler_count(cs_bin),
+ .BindingTableEntryCount = get_binding_table_entry_count(cs_bin),
+ .BarrierEnable = cs_prog_data->uses_barrier,
+ .SharedLocalMemorySize =
+ encode_slm_size(GEN_GEN, cs_prog_data->base.total_shared),
+
+#if !GEN_IS_HASWELL
+ .ConstantURBEntryReadOffset = 0,
+#endif
+ .ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
+#if GEN_GEN >= 8 || GEN_IS_HASWELL
+ .CrossThreadConstantDataReadLength =
+ cs_prog_data->push.cross_thread.regs,
+#endif
+
+ .NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads,
+ };
+ GENX(INTERFACE_DESCRIPTOR_DATA_pack)(NULL,
+ pipeline->interface_descriptor_data,
+ &desc);
+
*pPipeline = anv_pipeline_to_handle(pipeline);
return VK_SUCCESS;