nir, glsl: move pixel_center_integer/origin_upper_left to shader_info.fs

On GLSL that info is set as a layout qualifier when redeclaring
gl_FragCoord, so somehow tied to a specific variable. But in practice,
they behave as a global of the shader. On ARB programs they are set
using a global OPTION (defined at ARB_fragment_coord_conventions), and
on SPIR-V using ExecutionModes, that are also not tied specifically to
the builtin.

This patch moves that info from nir variable and ir variable to nir
shader and gl_program shader_info respectively, so the map is more
similar to SPIR-V, and ARB programs, instead of more similar to GLSL.

FWIW, shader_info.fs already had pixel_center_integer, so this change
also removes some redundancy. Also, as struct gl_program also includes
a shader_info, we removed gl_program::OriginUpperLeft and
PixelCenterInteger, as it would be superfluous.

This change was needed because recently spirv_to_nir changed the order
in which execution modes and variables are handled, so the variables
didn't get the correct values. Now the info is set on the shader
itself, and we don't need to go back to the builtin variable to set
it.

Fixes: e68871f6a ("spirv: Handle constants and types before execution
                   modes")

v2: (Jason)
   * glsl_to_nir: get the info before glsl_to_nir, while all the rest
     of the info gathering is happening
   * prog_to_nir: gather the info on a general info-gathering pass,
     not on variable setup.

v3: (Jason)
   * Squash with the patch that removes that info from ir variable
   * anv: assert that OriginUpperLeft is true. It should be already
     set by spirv_to_nir.
   * blorp: set origin_upper_left on its core "compile fragment
     shader", not just on some specific places (for this we added an
     helper on a previous patch).
   * prog_to_nir: no need to gather specifically this fragcoord modes
     as the full gl_program shader_info is copied.
   * spirv_to_nir: assert that we are a fragment shader when handling
     this execution modes.

v4: (reported by failing gitlab pipeline #18750)
   * state_tracker: update too due changes on ir.h/gl_program

v5:
   * blorp: minor change after change on previous patch
   * radeonsi: update due this change.

v6: (Timothy Arceri)
   * prog_to_nir: remove extra whitespace
   * shader_info: don't use :1 on origin_upper_left
   * glsl: program.fs.origin_upper_left/pixel_center_integer can be
     move out of the shader list loop

4 files changed, 10 insertions, 4 deletions

diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 9bea4ffbe2c..f879ec4141f 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -87,7 +87,6 @@ brw_blorp_blit_vars_init(nir_builder *b, struct brw_blorp_blit_vars *v,
    v->frag_coord = nir_variable_create(b->shader, nir_var_shader_in,
                                        glsl_vec4_type(), "gl_FragCoord");
    v->frag_coord->data.location = VARYING_SLOT_POS;
-   v->frag_coord->data.origin_upper_left = true;
 
    v->color_out = nir_variable_create(b->shader, nir_var_shader_out,
                                       glsl_vec4_type(), "gl_FragColor");
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 1ca0c44835e..657f5970d48 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -74,7 +74,6 @@ blorp_params_get_clear_kernel(struct blorp_batch *batch,
          nir_variable_create(b.shader, nir_var_shader_in,
                              glsl_vec4_type(), "gl_FragCoord");
       frag_coord->data.location = VARYING_SLOT_POS;
-      frag_coord->data.origin_upper_left = true;
 
       nir_ssa_def *pos = nir_f2i32(&b, nir_load_var(&b, frag_coord));
       nir_ssa_def *comp = nir_umod(&b, nir_channel(&b, pos, 0),
diff --git a/src/intel/blorp/blorp_nir_builder.h b/src/intel/blorp/blorp_nir_builder.h
index 28c34d19da6..9664bdbcd27 100644
--- a/src/intel/blorp/blorp_nir_builder.h
+++ b/src/intel/blorp/blorp_nir_builder.h
@@ -32,6 +32,8 @@ blorp_nir_init_shader(nir_builder *b,
    nir_builder_init_simple_shader(b, mem_ctx, stage, NULL);
    if (name != NULL)
       b->shader->info.name = ralloc_strdup(b->shader, name);
+   if (stage == MESA_SHADER_FRAGMENT)
+      b->shader->info.fs.origin_upper_left = true;
 }
 
 static inline nir_ssa_def *
@@ -42,7 +44,6 @@ blorp_nir_frag_coord(nir_builder *b)
                           glsl_vec4_type(), "gl_FragCoord");
 
    frag_coord->data.location = VARYING_SLOT_POS;
-   frag_coord->data.origin_upper_left = true;
 
    return nir_load_var(b, frag_coord);
 }
diff --git a/src/intel/vulkan/anv_nir_lower_input_attachments.c b/src/intel/vulkan/anv_nir_lower_input_attachments.c
index 655e5844955..9c6f9f434d7 100644
--- a/src/intel/vulkan/anv_nir_lower_input_attachments.c
+++ b/src/intel/vulkan/anv_nir_lower_input_attachments.c
@@ -35,7 +35,14 @@ load_frag_coord(nir_builder *b)
    nir_variable *pos = nir_variable_create(b->shader, nir_var_shader_in,
                                            glsl_vec4_type(), NULL);
    pos->data.location = VARYING_SLOT_POS;
-   pos->data.origin_upper_left = true;
+   /**
+    * From Vulkan spec:
+    *   "The OriginLowerLeft execution mode must not be used; fragment entry
+    *    points must declare OriginUpperLeft."
+    *
+    * So at this point origin_upper_left should be true
+    */
+   assert(b->shader->info.fs.origin_upper_left == true);
 
    return nir_load_var(b, pos);
 }