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authorJason Ekstrand <[email protected]>2016-03-31 18:38:21 -0700
committerJason Ekstrand <[email protected]>2016-04-08 15:58:52 -0700
commit0a6842c1bd18e1b2b7ef5e969b9f5df891604815 (patch)
tree38f14ff116991141fcf3d34fa1a31909d5d915a3 /src/intel
parent2e827816fa10f6b5c9c13c5833e3af5db2621efa (diff)
isl/surface_state: Set the correct pitch for W-tiled surfaces
Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src/intel')
-rw-r--r--src/intel/isl/isl_surface_state.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index 6afe45d650e..cac59fab78e 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -261,7 +261,6 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
.Height = info->surf->logical_level0_px.height - 1,
.Depth = 0, /* TEMPLATE */
- .SurfacePitch = info->surf->row_pitch - 1,
.RenderTargetViewExtent = 0, /* TEMPLATE */
.MinimumArrayElement = 0, /* TEMPLATE */
@@ -295,6 +294,19 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
#endif
};
+ if (info->surf->tiling == ISL_TILING_W) {
+ /* From the Broadwell PRM documentation for this field:
+ *
+ * "If the surface is a stencil buffer (and thus has Tile Mode set
+ * to TILEMODE_WMAJOR), the pitch must be set to 2x the value
+ * computed based on width, as the stencil buffer is stored with
+ * two rows interleaved."
+ */
+ s.SurfacePitch = info->surf->row_pitch * 2 - 1;
+ } else {
+ s.SurfacePitch = info->surf->row_pitch - 1;
+ }
+
if (info->view->usage & ISL_SURF_USAGE_STORAGE_BIT) {
s.SurfaceFormat = isl_lower_storage_image_format(dev, info->view->format);
} else {