diff options
| author | Lionel Landwerlin <[email protected]> | 2020-03-10 17:49:30 +0200 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-03-18 09:19:53 +0000 |
| commit | 25a54554b319ce38dbe11f92cb2447bfb6b5b78f (patch) | |
| tree | 5dd117cd15c2bf9f62f8b104383a424f544c2251 /src/intel | |
| parent | 0c41937440276498b76c30657bc8d884ed8220db (diff) | |
intel/decoder: don't consider header fields past dword0
v2: use ULL
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Danylo Piliaiev <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4134>
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/common/gen_decoder.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c index 97e8f168228..d07962a0b97 100644 --- a/src/intel/common/gen_decoder.c +++ b/src/intel/common/gen_decoder.c @@ -1208,10 +1208,12 @@ gen_field_is_header(struct gen_field *field) { uint32_t bits; - if (field->start >= 32) + /* Instructions are identified by the first DWord. */ + if (field->start >= 32 || + field->end >= 32) return false; - bits = (1U << (field->end - field->start + 1)) - 1; + bits = (1ULL << (field->end - field->start + 1)) - 1; bits <<= field->start; return (field->parent->opcode_mask & bits) != 0; |