diff options
| author | Nanley Chery <[email protected]> | 2017-01-05 16:46:37 -0800 |
|---|---|---|
| committer | Nanley Chery <[email protected]> | 2017-01-12 20:52:20 -0800 |
| commit | 3b7106c18136a107bd0d396bf061b8c9f914b4b9 (patch) | |
| tree | 7fea92940725509823636500b222023e293218e3 /src/intel/vulkan | |
| parent | f357af0c90866d3b4e9bd208f16999c44b2ba66f (diff) | |
anv: Use gen8 BLORP HiZ clearing functions
Signed-off-by: Nanley Chery <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/vulkan')
| -rw-r--r-- | src/intel/vulkan/anv_blorp.c | 54 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 1 |
2 files changed, 50 insertions, 5 deletions
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 97ce236fc52..fdea2d0a23f 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -1163,6 +1163,8 @@ void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) { const struct anv_cmd_state *cmd_state = &cmd_buffer->state; + const VkRect2D render_area = cmd_buffer->state.render_area; + if (!subpass_needs_clear(cmd_buffer)) return; @@ -1197,8 +1199,6 @@ anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) att_state->aux_usage, &surf); surf.clear_color = vk_to_isl_color(att_state->clear_value.color); - const VkRect2D render_area = cmd_buffer->state.render_area; - if (att_state->fast_clear) { blorp_fast_clear(&batch, &surf, iview->isl.format, iview->isl.base_level, @@ -1238,8 +1238,54 @@ anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer) .clearValue = cmd_state->attachments[ds].clear_value, }; - clear_depth_stencil_attachment(cmd_buffer, &batch, - &clear_att, 1, &clear_rect); + + const uint8_t gen = cmd_buffer->device->info.gen; + bool clear_with_hiz = gen >= 8 && cmd_state->attachments[ds].aux_usage == + ISL_AUX_USAGE_HIZ; + const struct anv_image_view *iview = fb->attachments[ds]; + + if (clear_with_hiz) { + const bool clear_depth = clear_att.aspectMask & + VK_IMAGE_ASPECT_DEPTH_BIT; + const bool clear_stencil = clear_att.aspectMask & + VK_IMAGE_ASPECT_STENCIL_BIT; + + /* Check against restrictions for depth buffer clearing. A great GPU + * performance benefit isn't expected when using the HZ sequence for + * stencil-only clears. Therefore, we don't emit a HZ op sequence for + * a stencil clear in addition to using the BLORP-fallback for depth. + */ + if (clear_depth) { + if (!blorp_can_hiz_clear_depth(gen, iview->isl.format, + iview->image->samples, + render_area.offset.x, + render_area.offset.y, + render_area.offset.x + + render_area.extent.width, + render_area.offset.y + + render_area.extent.height)) { + clear_with_hiz = false; + } + } + + if (clear_with_hiz) { + blorp_gen8_hiz_clear_attachments(&batch, iview->image->samples, + render_area.offset.x, + render_area.offset.y, + render_area.offset.x + + render_area.extent.width, + render_area.offset.y + + render_area.extent.height, + clear_depth, clear_stencil, + clear_att.clearValue. + depthStencil.stencil); + } + } + + if (!clear_with_hiz) { + clear_depth_stencil_attachment(cmd_buffer, &batch, + &clear_att, 1, &clear_rect); + } cmd_state->attachments[ds].pending_clear_aspects = 0; } diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index b670d00e2dc..63f6be12a8e 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -2250,7 +2250,6 @@ genX(cmd_buffer_set_subpass)(struct anv_cmd_buffer *cmd_buffer, cmd_buffer_emit_depth_stencil(cmd_buffer); genX(cmd_buffer_emit_hz_op)(cmd_buffer, BLORP_HIZ_OP_HIZ_RESOLVE); - genX(cmd_buffer_emit_hz_op)(cmd_buffer, BLORP_HIZ_OP_DEPTH_CLEAR); anv_cmd_buffer_clear_subpass(cmd_buffer); } |