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authorAnuj Phogat <[email protected]>2016-09-26 11:40:00 -0700
committerAnuj Phogat <[email protected]>2016-10-04 13:20:35 -0700
commit1ffcf95fc4a63c56471eeee268d1a973daa55d7a (patch)
tree1c6858bda288be0d51b42f490c8c092b8fc5fcb1 /src/intel/vulkan
parentdeeb1e95d02da778910c669e15c648a1ea156258 (diff)
anv/gen7_pipeline: Set sample mask field in 3DSTATE_PS
Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/vulkan')
-rw-r--r--src/intel/vulkan/gen7_pipeline.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 8de9749043d..d4d494f6210 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -237,6 +237,9 @@ genX(graphics_pipeline_create)(
/* Haswell requires the sample mask to be set in this packet as well as
* in 3DSTATE_SAMPLE_MASK; the values should match. */
/* _NEW_BUFFERS, _NEW_MULTISAMPLE */
+#if GEN_IS_HASWELL
+ ps.SampleMask = 0xff;
+#endif
}
uint32_t samples = pCreateInfo->pMultisampleState ?