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authorJason Ekstrand <[email protected]>2017-09-14 19:52:38 -0700
committerJordan Justen <[email protected]>2017-10-20 12:49:17 -0700
commit59fb59ad54d368683d5cc3b149f021452bddc05f (patch)
tree734e742be190df8ae7a19a975c59ba7eeeded6eb /src/intel/vulkan
parent341529dbee5c2b17fdcb7990484a383459bed305 (diff)
nir: Get rid of nir_shader::stage
It's redundant with nir_shader::info::stage. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/intel/vulkan')
-rw-r--r--src/intel/vulkan/anv_nir_apply_pipeline_layout.c13
-rw-r--r--src/intel/vulkan/anv_nir_lower_input_attachments.c2
-rw-r--r--src/intel/vulkan/anv_nir_lower_multiview.c14
-rw-r--r--src/intel/vulkan/anv_pipeline.c2
4 files changed, 16 insertions, 15 deletions
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 3ca2b04049a..f8d81648a9a 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -296,6 +296,7 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
struct anv_pipeline_bind_map *map)
{
struct anv_pipeline_layout *layout = pipeline->layout;
+ gl_shader_stage stage = shader->info.stage;
struct apply_pipeline_layout_state state = {
.shader = shader,
@@ -328,15 +329,15 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
BITSET_WORD b, _tmp;
BITSET_FOREACH_SET(b, _tmp, state.set[set].used,
set_layout->binding_count) {
- if (set_layout->binding[b].stage[shader->stage].surface_index >= 0) {
+ if (set_layout->binding[b].stage[stage].surface_index >= 0) {
map->surface_count +=
anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]);
}
- if (set_layout->binding[b].stage[shader->stage].sampler_index >= 0) {
+ if (set_layout->binding[b].stage[stage].sampler_index >= 0) {
map->sampler_count +=
anv_descriptor_set_binding_layout_get_hw_size(&set_layout->binding[b]);
}
- if (set_layout->binding[b].stage[shader->stage].image_index >= 0)
+ if (set_layout->binding[b].stage[stage].image_index >= 0)
map->image_count += set_layout->binding[b].array_size;
}
}
@@ -353,7 +354,7 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
struct anv_descriptor_set_binding_layout *binding =
&set_layout->binding[b];
- if (binding->stage[shader->stage].surface_index >= 0) {
+ if (binding->stage[stage].surface_index >= 0) {
state.set[set].surface_offsets[b] = surface;
struct anv_sampler **samplers = binding->immutable_samplers;
for (unsigned i = 0; i < binding->array_size; i++) {
@@ -368,7 +369,7 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
}
}
- if (binding->stage[shader->stage].sampler_index >= 0) {
+ if (binding->stage[stage].sampler_index >= 0) {
state.set[set].sampler_offsets[b] = sampler;
struct anv_sampler **samplers = binding->immutable_samplers;
for (unsigned i = 0; i < binding->array_size; i++) {
@@ -383,7 +384,7 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
}
}
- if (binding->stage[shader->stage].image_index >= 0) {
+ if (binding->stage[stage].image_index >= 0) {
state.set[set].image_offsets[b] = image;
image += binding->array_size;
}
diff --git a/src/intel/vulkan/anv_nir_lower_input_attachments.c b/src/intel/vulkan/anv_nir_lower_input_attachments.c
index 6ed7fafbf01..58b9b340a42 100644
--- a/src/intel/vulkan/anv_nir_lower_input_attachments.c
+++ b/src/intel/vulkan/anv_nir_lower_input_attachments.c
@@ -114,7 +114,7 @@ try_lower_input_load(nir_function_impl *impl, nir_intrinsic_instr *load)
void
anv_nir_lower_input_attachments(nir_shader *shader)
{
- assert(shader->stage == MESA_SHADER_FRAGMENT);
+ assert(shader->info.stage == MESA_SHADER_FRAGMENT);
nir_foreach_function(function, shader) {
if (!function->impl)
diff --git a/src/intel/vulkan/anv_nir_lower_multiview.c b/src/intel/vulkan/anv_nir_lower_multiview.c
index f40e1111492..88e6f9af877 100644
--- a/src/intel/vulkan/anv_nir_lower_multiview.c
+++ b/src/intel/vulkan/anv_nir_lower_multiview.c
@@ -44,7 +44,7 @@ struct lower_multiview_state {
static nir_ssa_def *
build_instance_id(struct lower_multiview_state *state)
{
- assert(state->builder.shader->stage == MESA_SHADER_VERTEX);
+ assert(state->builder.shader->info.stage == MESA_SHADER_VERTEX);
if (state->instance_id == NULL) {
nir_builder *b = &state->builder;
@@ -74,7 +74,7 @@ build_view_index(struct lower_multiview_state *state)
assert(state->view_mask != 0);
if (0 && _mesa_bitcount(state->view_mask) == 1) {
state->view_index = nir_imm_int(b, ffs(state->view_mask) - 1);
- } else if (state->builder.shader->stage == MESA_SHADER_VERTEX) {
+ } else if (state->builder.shader->info.stage == MESA_SHADER_VERTEX) {
/* We only support 16 viewports */
assert((state->view_mask & 0xffff0000) == 0);
@@ -122,15 +122,15 @@ build_view_index(struct lower_multiview_state *state)
}
} else {
const struct glsl_type *type = glsl_int_type();
- if (b->shader->stage == MESA_SHADER_TESS_CTRL ||
- b->shader->stage == MESA_SHADER_GEOMETRY)
+ if (b->shader->info.stage == MESA_SHADER_TESS_CTRL ||
+ b->shader->info.stage == MESA_SHADER_GEOMETRY)
type = glsl_array_type(type, 1);
nir_variable *idx_var =
nir_variable_create(b->shader, nir_var_shader_in,
type, "view index");
idx_var->data.location = VARYING_SLOT_VIEW_INDEX;
- if (b->shader->stage == MESA_SHADER_FRAGMENT)
+ if (b->shader->info.stage == MESA_SHADER_FRAGMENT)
idx_var->data.interpolation = INTERP_MODE_FLAT;
if (glsl_type_is_array(type)) {
@@ -154,7 +154,7 @@ build_view_index(struct lower_multiview_state *state)
bool
anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask)
{
- assert(shader->stage != MESA_SHADER_COMPUTE);
+ assert(shader->info.stage != MESA_SHADER_COMPUTE);
/* If multiview isn't enabled, we have nothing to do. */
if (view_mask == 0)
@@ -202,7 +202,7 @@ anv_nir_lower_multiview(nir_shader *shader, uint32_t view_mask)
* available in the VS. If it's not a fragment shader, we need to pass
* the view index on to the next stage.
*/
- if (shader->stage != MESA_SHADER_FRAGMENT) {
+ if (shader->info.stage != MESA_SHADER_FRAGMENT) {
nir_ssa_def *view_index = build_view_index(&state);
nir_builder *b = &state.builder;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 7bfdb5c5509..51788928af8 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -138,7 +138,7 @@ anv_shader_compile_to_nir(struct anv_pipeline *pipeline,
spec_entries, num_spec_entries,
stage, entrypoint_name, &supported_ext, nir_options);
nir_shader *nir = entry_point->shader;
- assert(nir->stage == stage);
+ assert(nir->info.stage == stage);
nir_validate_shader(nir);
ralloc_steal(mem_ctx, nir);