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authorJason Ekstrand <[email protected]>2018-02-21 13:07:10 -0800
committerJason Ekstrand <[email protected]>2018-02-21 13:54:11 -0800
commit52056206e171f8eec0afc16cfd90ee68bf290e7b (patch)
tree68d733e6fdd57ad7721c575278df20f607992180 /src/intel/vulkan
parent7dd0f73fe15e04e02eb24272ff0cacf932ba8392 (diff)
anv: Don't assert that stencil HiZ clears are single-slice
It's true for depth HiZ clears because we only have HiZ on single-slice images right now. However, for stencil-only clears there is no such restriction. Tested-by: Rafael Antognolli <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src/intel/vulkan')
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 8015a42c154..ce546249b34 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -3438,9 +3438,12 @@ cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
VK_IMAGE_ASPECT_STENCIL_BIT)) {
if (att_state->fast_clear) {
/* We currently only support HiZ for single-layer images */
- assert(iview->planes[0].isl.base_level == 0);
- assert(iview->planes[0].isl.base_array_layer == 0);
- assert(fb->layers == 1);
+ if (att_state->pending_clear_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
+ assert(iview->image->planes[0].aux_usage == ISL_AUX_USAGE_HIZ);
+ assert(iview->planes[0].isl.base_level == 0);
+ assert(iview->planes[0].isl.base_array_layer == 0);
+ assert(fb->layers == 1);
+ }
anv_image_hiz_clear(cmd_buffer, image,
att_state->pending_clear_aspects,