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authorJason Ekstrand <[email protected]>2016-04-28 15:37:39 -0700
committerJason Ekstrand <[email protected]>2016-05-14 13:34:25 -0700
commitbee160b31be9e09eeab83f62d26ac331f08955fa (patch)
treee0446c57d900f30d17419758c3ea3b37c24ded4a /src/intel/vulkan/genX_pipeline_util.h
parent7be100ac9af52b1ab5e2c34b45aba0d66304d55a (diff)
i965/fs: Organize prog_data by ksp number rather than SIMD width
The hardware packets organize kernel pointers and GRF start by slots that don't map directly to dispatch width. This means that all of the state setup code has to re-arrange the data from prog_data into these slots. This logic has been duplicated 4 times in the GL driver and one more time in the Vulkan driver. Let's just put it all in brw_fs.cpp. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/vulkan/genX_pipeline_util.h')
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