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authorLionel Landwerlin <[email protected]>2019-04-27 11:35:32 +0800
committerLionel Landwerlin <[email protected]>2019-04-29 11:41:27 +0000
commit9628631a380ff24630bf97b982df07b4e7e2a79f (patch)
tree3b1bce0d90f8f27fba45fcf92414b8e0d2e4352b /src/intel/vulkan/genX_pipeline.c
parentcc5b8a938a4064c26bd9cd034ad2cafedb04ee9a (diff)
Revert "anv: limit URB reconfigurations when using blorp"
In commit 0d46e404 ("anv: limit URB reconfigurations when using blorp") we tried to limit the number of URB reconfiguration by checking if the last allocation is large enough to fit the blorp dispatch. We used the last bound pipeline to compare the allocation. The problem with this is that the pipeline is bound but its commands might not have been emitted into the command buffer yet. Let's just revert commit 0d46e404677264bfb12ada15290e39c10a5eb455 since it didn't seem to yield any performance improvement. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 0d46e404 ("anv: limit URB reconfigurations when using blorp") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110535 Acked-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/vulkan/genX_pipeline.c')
-rw-r--r--src/intel/vulkan/genX_pipeline.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index f2b7faca4a2..0b58dce05b0 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -308,18 +308,18 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
static void
emit_urb_setup(struct anv_pipeline *pipeline)
{
+ unsigned entry_size[4];
for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
const struct brw_vue_prog_data *prog_data =
!anv_pipeline_has_stage(pipeline, i) ? NULL :
(const struct brw_vue_prog_data *) pipeline->shaders[i]->prog_data;
- pipeline->urb.entry_size[i] = prog_data ? prog_data->urb_entry_size : 1;
+ entry_size[i] = prog_data ? prog_data->urb_entry_size : 1;
}
genX(emit_urb_setup)(pipeline->device, &pipeline->batch,
pipeline->urb.l3_config,
- pipeline->active_stages,
- pipeline->urb.entry_size);
+ pipeline->active_stages, entry_size);
}
static void