diff options
| author | Jordan Justen <[email protected]> | 2016-04-02 01:34:40 -0700 |
|---|---|---|
| committer | Jordan Justen <[email protected]> | 2016-05-17 13:04:03 -0700 |
| commit | 8a80af282091e692da7bf4e412918ba2362dfb4f (patch) | |
| tree | 802322f737c6e4bd3658146f43442dd3962a2f90 /src/intel/vulkan/genX_pipeline.c | |
| parent | aa41de080dad1996877fe7faaa8fed5e63d2f622 (diff) | |
anv: Port L3 cache programming from i965
Signed-off-by: Jordan Justen <[email protected]>
Acked-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/vulkan/genX_pipeline.c')
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 2a41b2d91fa..918a9a4f03b 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -84,6 +84,8 @@ genX(compute_pipeline_create)( pipeline->use_repclear = false; + anv_setup_pipeline_l3_config(pipeline); + const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline); const struct brw_stage_prog_data *prog_data = &cs_prog_data->base; |