diff options
author | Francisco Jerez <[email protected]> | 2019-01-15 13:35:30 -0800 |
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committer | Francisco Jerez <[email protected]> | 2019-01-18 16:09:39 -0800 |
commit | c84ec70b3a72a3640a40e72689d72da8337e9801 (patch) | |
tree | 842792ff9255ecbfaa6473e4504c05baadbbb235 /src/intel/vulkan/genX_gpu_memcpy.c | |
parent | 9e669ed22b52857495593b92537d53c9ead7d424 (diff) |
intel/fs: Promote execution type to 32-bit when any half-float conversion is needed.
The docs are fairly incomplete and inconsistent about it, but this
seems to be the reason why half-float destinations are required to be
DWORD-aligned on BDW+ projects. This way the regioning lowering pass
will make sure that the destination components of W to HF and HF to W
conversions are aligned like the corresponding conversion operation
with 32-bit execution data type.
Tested-by: Iago Toral Quiroga <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/vulkan/genX_gpu_memcpy.c')
0 files changed, 0 insertions, 0 deletions