diff options
author | Lionel Landwerlin <[email protected]> | 2020-01-15 14:07:29 +0200 |
---|---|---|
committer | Marge Bot <[email protected]> | 2020-02-05 00:25:48 +0000 |
commit | 8949d27bb8b4385e92049c18f728bdcf0a79b093 (patch) | |
tree | 105d279a8f19d17afeede8115493b4b4b54cfb29 /src/intel/vulkan/anv_private.h | |
parent | 19e7bcee1742a40981a0b1c06447bca22646c294 (diff) |
anv: implement gen9 post sync pipe control workaround
We've been missing this workaround for a while and since it's required
for Gen12, let's implement it for Gen9 first.
v2: Update comment for Gen9.
v3: Fix clearing of bits... (Lionel)
Signed-off-by: Lionel Landwerlin <[email protected]>
Cc: <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
Diffstat (limited to 'src/intel/vulkan/anv_private.h')
-rw-r--r-- | src/intel/vulkan/anv_private.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index ad7612ca611..d794a9db5dd 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2272,6 +2272,12 @@ enum anv_pipe_bits { * done by writing the AUX-TT register. */ ANV_PIPE_AUX_TABLE_INVALIDATE_BIT = (1 << 23), + + /* This bit does not exist directly in PIPE_CONTROL. It means that a + * PIPE_CONTROL with a post-sync operation will follow. This is used to + * implement a workaround for Gen9. + */ + ANV_PIPE_POST_SYNC_BIT = (1 << 24), }; #define ANV_PIPE_FLUSH_BITS ( \ |