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authorJason Ekstrand <[email protected]>2019-07-18 09:59:44 -0500
committerJason Ekstrand <[email protected]>2019-07-29 23:30:26 +0000
commit4bb6e6817ec5d627d58e499ca09f1f40641a1acd (patch)
treec5f65a2aa8cff090908f09d98fefc83041ae8c3e /src/intel/vulkan/anv_pipeline.c
parent44268b1c72e327a812678f123000942083407944 (diff)
intel: Use a system value for gl_FragCoord
It's kind-of an anomaly that the Intel drivers are still treating gl_FragCoord as an input. It also makes zero sense because we have to special-case it in the back-end. Because ANV is the only user of nir_lower_wpos_center, we go ahead and just update it to look for nir_intrinsic_load_frag_coord as part of this patch. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/vulkan/anv_pipeline.c')
-rw-r--r--src/intel/vulkan/anv_pipeline.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index c2a164cc802..a9a403f1233 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -167,6 +167,7 @@ anv_shader_compile_to_nir(struct anv_device *device,
};
struct spirv_to_nir_options spirv_options = {
.lower_workgroup_access_to_offsets = true,
+ .frag_coord_is_sysval = true,
.caps = {
.demote_to_helper_invocation = true,
.derivative_group = true,
@@ -652,7 +653,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
NIR_PASS_V(nir, nir_lower_wpos_center, pipeline->sample_shading_enable);
- NIR_PASS_V(nir, nir_lower_input_attachments, false);
+ NIR_PASS_V(nir, nir_lower_input_attachments, true);
}
NIR_PASS_V(nir, anv_nir_lower_ycbcr_textures, layout);