diff options
| author | Timothy Arceri <[email protected]> | 2016-10-13 11:41:23 +1100 |
|---|---|---|
| committer | Timothy Arceri <[email protected]> | 2016-10-26 14:29:36 +1100 |
| commit | e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b (patch) | |
| tree | 32b4e9dbc9c03aa7733e1e32721d92c3c54571e0 /src/intel/vulkan/anv_pipeline.c | |
| parent | 094fe3a9591ce200162d955635eee577c13f9324 (diff) | |
nir/i965/anv/radv/gallium: make shader info a pointer
When restoring something from shader cache we won't have and don't
want to create a nir_shader this change detaches the two.
There are other advantages such as being able to reuse the
shader info populated by GLSL IR.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/vulkan/anv_pipeline.c')
| -rw-r--r-- | src/intel/vulkan/anv_pipeline.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 4817de13af2..72f0643bd70 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -162,7 +162,7 @@ anv_shader_compile_to_nir(struct anv_device *device, nir_validate_shader(nir); /* Vulkan uses the separate-shader linking model */ - nir->info.separate_shader = true; + nir->info->separate_shader = true; nir = brw_preprocess_nir(compiler, nir); @@ -326,8 +326,8 @@ anv_pipeline_compile(struct anv_pipeline *pipeline, if (pipeline->layout && pipeline->layout->stage[stage].has_dynamic_offsets) prog_data->nr_params += MAX_DYNAMIC_BUFFERS * 2; - if (nir->info.num_images > 0) { - prog_data->nr_params += nir->info.num_images * BRW_IMAGE_PARAM_SIZE; + if (nir->info->num_images > 0) { + prog_data->nr_params += nir->info->num_images * BRW_IMAGE_PARAM_SIZE; pipeline->needs_data_cache = true; } @@ -335,7 +335,7 @@ anv_pipeline_compile(struct anv_pipeline *pipeline, ((struct brw_cs_prog_data *)prog_data)->thread_local_id_index = prog_data->nr_params++; /* The CS Thread ID uniform */ - if (nir->info.num_ssbos > 0) + if (nir->info->num_ssbos > 0) pipeline->needs_data_cache = true; if (prog_data->nr_params > 0) { @@ -458,12 +458,12 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline, ralloc_steal(mem_ctx, nir); - prog_data.inputs_read = nir->info.inputs_read; + prog_data.inputs_read = nir->info->inputs_read; brw_compute_vue_map(&pipeline->device->info, &prog_data.base.vue_map, - nir->info.outputs_written, - nir->info.separate_shader); + nir->info->outputs_written, + nir->info->separate_shader); unsigned code_size; const unsigned *shader_code = @@ -548,8 +548,8 @@ anv_pipeline_compile_gs(struct anv_pipeline *pipeline, brw_compute_vue_map(&pipeline->device->info, &prog_data.base.vue_map, - nir->info.outputs_written, - nir->info.separate_shader); + nir->info->outputs_written, + nir->info->separate_shader); unsigned code_size; const unsigned *shader_code = |