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authorSagar Ghuge <[email protected]>2019-03-22 19:13:54 -0700
committerMatt Turner <[email protected]>2019-05-07 14:33:48 -0700
commit4e828bb48abf12d43c2b4a373b4b2125c90ea152 (patch)
tree71d021ec2939a0d9dcdb78a35ff3419ecfb8f78c /src/intel/tools/tests/gen6/shl.asm
parent1fb5ce0a11ccb8a0f8d41d0499f8a16b1dfef379 (diff)
intel/tools: Add unit tests for assembler
v1: Pass executable object from meson to test(Dylan Baker) v2: Ignore generated output files from git status(Matt Turner) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
Diffstat (limited to 'src/intel/tools/tests/gen6/shl.asm')
-rw-r--r--src/intel/tools/tests/gen6/shl.asm13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/intel/tools/tests/gen6/shl.asm b/src/intel/tools/tests/gen6/shl.asm
new file mode 100644
index 00000000000..a8fce90e111
--- /dev/null
+++ b/src/intel/tools/tests/gen6/shl.asm
@@ -0,0 +1,13 @@
+shl(8) g25<1>.xD g21<4>.xD 0x00000004UD { align16 1Q };
+shl(8) g3<1>D g2.4<0,1,0>D 0x00000004UD { align1 1Q };
+shl(16) g3<1>D g2.4<0,1,0>D 0x00000004UD { align1 1H };
+shl(8) g11<1>D g11<4>D 16D { align16 1Q };
+shl(1) g28<1>UD g28<0,1,0>UD 0x00000010UD { align1 1N };
+shl(8) g64<1>.xUD g64<4>.xUD 0x00000010UD { align16 1Q };
+shl(8) m17<1>D g2<0,1,0>D 0x00000004UD { align1 1Q };
+shl(16) m17<1>D g2<0,1,0>D 0x00000004UD { align1 1H };
+shl(8) g2<1>D g2<8,8,1>D 16D { align1 1Q };
+shl(16) g2<1>D g2<8,8,1>D 16D { align1 1H };
+shl(8) g25<1>D g2<0>D g24<4>UD { align16 1Q };
+shl(8) g10<1>D g2.5<0,1,0>D g9<8,8,1>UD { align1 1Q };
+shl(16) g13<1>D g2.5<0,1,0>D g11<8,8,1>UD { align1 1H };