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authorSagar Ghuge <[email protected]>2019-03-22 19:13:54 -0700
committerMatt Turner <[email protected]>2019-05-07 14:33:48 -0700
commit4e828bb48abf12d43c2b4a373b4b2125c90ea152 (patch)
tree71d021ec2939a0d9dcdb78a35ff3419ecfb8f78c /src/intel/tools/tests/gen6/dp3.asm
parent1fb5ce0a11ccb8a0f8d41d0499f8a16b1dfef379 (diff)
intel/tools: Add unit tests for assembler
v1: Pass executable object from meson to test(Dylan Baker) v2: Ignore generated output files from git status(Matt Turner) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
Diffstat (limited to 'src/intel/tools/tests/gen6/dp3.asm')
-rw-r--r--src/intel/tools/tests/gen6/dp3.asm10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/intel/tools/tests/gen6/dp3.asm b/src/intel/tools/tests/gen6/dp3.asm
new file mode 100644
index 00000000000..c51880a4e4b
--- /dev/null
+++ b/src/intel/tools/tests/gen6/dp3.asm
@@ -0,0 +1,10 @@
+dp3(8) m4<1>.xF g3<0>.xyzzF g6<4>.xyzzF { align16 NoDDClr 1Q };
+dp3(8) m4<1>.yF g3.4<0>.xyzzF g6<4>.xyzzF { align16 NoDDClr,NoDDChk 1Q };
+dp3(8) g70<1>F g67<4>.xyzzF g67<4>.xyzzF { align16 1Q };
+dp3(8) m4<1>.xF g4<4>.xyzzF g5<4>.xyzzF { align16 1Q };
+dp3.le.f0.0(8) g42<1>.xF g33<4>.xyzzF g3.4<0>.xyzzF { align16 1Q };
+dp3(8) g21<1>.xF g20<4>.xyzzF g1<0>.xyzzF { align16 NoDDClr 1Q };
+dp3(8) g21<1>.yF g20<4>.xyzzF g1.4<0>.xyzzF { align16 NoDDClr,NoDDChk 1Q };
+dp3(8) g21<1>.zF g20<4>.xyzzF g2<0>.xyzzF { align16 NoDDChk 1Q };
+dp3.sat(8) g49<1>F g38<4>.xyzzF g43<4>.xyzzF { align16 1Q };
+dp3.sat(8) m4<1>F g2<4>.xyzzF g2<4>.xyzzF { align16 1Q };