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authorNanley Chery <[email protected]>2019-08-08 13:40:08 -0700
committerNanley Chery <[email protected]>2019-10-28 10:47:05 -0700
commit6670e07a6efb69951c45583b51d51de31c9e7119 (patch)
tree111b955273d57ecce57ec658d1498c05bfaa0ab9 /src/intel/isl
parentf93bc14618ae22a3d3b8030be6ba58d589f0bab8 (diff)
intel: Enable CCS_E for R24_UNORM_X8_TYPELESS on TGL+
While this format isn't listed in BSpec: 53911, other documentation and empirical evidence suggest that it's fine to remap it to R32_FLOAT. I've filed a bug for the BSpec page. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/intel/isl')
-rw-r--r--src/intel/isl/isl_format.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
index d053a362138..ae6df522359 100644
--- a/src/intel/isl/isl_format.c
+++ b/src/intel/isl/isl_format.c
@@ -167,7 +167,7 @@ static const struct surface_format_info format_info[] = {
SF( Y, x, x, x, Y, x, Y, Y, x, 70, 70, 90, R32_SINT)
SF( Y, x, x, x, Y, x, Y, Y, x, 70, 70, 90, R32_UINT)
SF( Y, 50, Y, x, Y, Y, Y, Y, x, 70, 70, 90, R32_FLOAT)
- SF( Y, 50, Y, x, x, x, x, x, x, x, x, x, R24_UNORM_X8_TYPELESS)
+ SF( Y, 50, Y, x, x, x, x, x, x, x, x, 120, R24_UNORM_X8_TYPELESS)
SF( Y, x, x, x, x, x, x, x, x, x, x, x, X24_TYPELESS_G8_UINT)
SF( Y, Y, x, x, x, x, x, x, x, x, x, x, L16A16_UNORM)
SF( Y, 50, Y, x, x, x, x, x, x, x, x, x, I24X8_UNORM)