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authorEric Engestrom <[email protected]>2018-08-16 15:41:53 +0100
committerEric Engestrom <[email protected]>2018-08-16 17:38:25 +0100
commit81c1989e4ff229d6fc49fab1c01eaab3d81432dc (patch)
tree499035e6d4a8a775b2de0f1bc6f433a23a5dd15e /src/intel/isl
parentaa78b29ebad710d743747bb9b9755b6eea9ed4d2 (diff)
intel: various python cleanups
Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
Diffstat (limited to 'src/intel/isl')
-rw-r--r--src/intel/isl/gen_format_layout.py9
1 files changed, 4 insertions, 5 deletions
diff --git a/src/intel/isl/gen_format_layout.py b/src/intel/isl/gen_format_layout.py
index 1fa7c6267df..c1f22707fb9 100644
--- a/src/intel/isl/gen_format_layout.py
+++ b/src/intel/isl/gen_format_layout.py
@@ -25,7 +25,6 @@ from __future__ import absolute_import, division, print_function
import argparse
import csv
import re
-import textwrap
from mako import template
@@ -150,7 +149,7 @@ class Channel(object):
self.size = int(grouped.group('size'))
# Default the start bit to -1
- self.start = -1;
+ self.start = -1
class Format(object):
@@ -177,7 +176,7 @@ class Format(object):
bit = 0
for c in self.order:
chan = getattr(self, c)
- chan.start = bit;
+ chan.start = bit
bit = bit + chan.size
# alpha doesn't have a colorspace of it's own.
@@ -217,13 +216,13 @@ def get_srgb_to_linear_map(formats):
('U8SRGB', 'FLT16'),
]
- found = False;
+ found = False
for rep in replacements:
rgb_name = fmt.name.replace(rep[0], rep[1])
if rgb_name in names:
found = True
yield fmt.name, rgb_name
- break;
+ break
# We should have found a format name
assert found