aboutsummaryrefslogtreecommitdiffstats
path: root/src/intel/isl
diff options
context:
space:
mode:
authorSagar Ghuge <[email protected]>2019-09-18 12:37:59 -0700
committerSagar Ghuge <[email protected]>2019-10-28 14:02:01 -0700
commit366fcbf2d8d35e187e4d28e1410605c15b6da101 (patch)
tree8d48348db9039e394fa21931a1f6f3b8d99e0661 /src/intel/isl
parent758a6a3a00b081db75be236e6b5c0d03e1e35440 (diff)
intel/isl: Support lossless compression with multisamples
GEN12 adds the ability to losslessly compress each sample plane in a multisampled buffer that uses MCS compression. v2: Remove unnecessary assertion (Nanley Chery) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src/intel/isl')
-rw-r--r--src/intel/isl/isl.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index b22cd009e83..7ca2dc7809b 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1848,13 +1848,9 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
if (aux_surf->usage & ISL_SURF_USAGE_CCS_BIT)
return false;
- /* Only multisampled depth buffers with HiZ can have CCS. */
- if (surf->samples > 1 && !(aux_surf->usage & ISL_SURF_USAGE_HIZ_BIT))
+ if (ISL_DEV_GEN(dev) < 12 && surf->samples > 1)
return false;
- assert(surf->msaa_layout == ISL_MSAA_LAYOUT_NONE ||
- surf->msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED);
-
/* CCS support does not exist prior to Gen7 */
if (ISL_DEV_GEN(dev) <= 6)
return false;