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authorJason Ekstrand <[email protected]>2020-01-23 22:21:03 -0600
committerMarge Bot <[email protected]>2020-01-24 19:18:27 +0000
commit17e225ee1e55996eabc675e210f5c97be4c00c83 (patch)
tree5620c73736cf6700cd032436959d1ddcfa9f3e1f /src/intel/isl
parent4cd23420bd965be22df2fbdc884803cd219f9532 (diff)
intel/isl: Add a hack for the Gen12 A0 texture buffer bug
Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3547> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3547>
Diffstat (limited to 'src/intel/isl')
-rw-r--r--src/intel/isl/isl_surface_state.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index b1e38fdf66e..f1d55686797 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -806,6 +806,25 @@ isl_genX(buffer_fill_state_s)(const struct isl_device *dev, void *state,
s.Depth = ((num_elements - 1) >> 20) & 0x7f;
#endif
+ if (GEN_GEN == 12 && dev->info->revision == 0) {
+ /* TGL-LP A0 has a HW bug (fixed in later HW) which causes buffer
+ * textures with very close base addresses (delta < 64B) to corrupt each
+ * other. We can sort-of work around this by making small buffer
+ * textures 1D textures instead. This doesn't fix the problem for large
+ * buffer textures but the liklihood of large, overlapping, and very
+ * close buffer textures is fairly low and the point is to hack around
+ * the bug so we can run apps and tests.
+ */
+ if (info->format != ISL_FORMAT_RAW &&
+ info->stride_B == isl_format_get_layout(info->format)->bpb / 8 &&
+ num_elements <= (1 << 14)) {
+ s.SurfaceType = SURFTYPE_1D;
+ s.Width = num_elements - 1;
+ s.Height = 0;
+ s.Depth = 0;
+ }
+ }
+
s.SurfacePitch = info->stride_B - 1;
#if GEN_GEN >= 6