diff options
author | Rafael Antognolli <[email protected]> | 2017-08-10 09:29:51 -0700 |
---|---|---|
committer | Rafael Antognolli <[email protected]> | 2018-04-05 07:42:45 -0700 |
commit | b8f45cf967e1810c4e59b49b1ed1d955f01496a1 (patch) | |
tree | 7516e7c6604f5acc18541511b836c8e8318e72f2 /src/intel/isl/isl.h | |
parent | 94675edcfda93dab29f2ed8a1f218d6491dbb085 (diff) |
intel/isl: Add support to emit clear value address.
gen10 can emit the clear color by setting it on a buffer somewhere, and
then adding only the address to the surface state.
This commit add support for that on isl_surf_fill_state, and if that is
requested, skip setting the clear value itself.
v2: Add assert to make sure we are at least on gen10.
Signed-off-by: Rafael Antognolli <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/isl/isl.h')
-rw-r--r-- | src/intel/isl/isl.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index 2edf0522e32..c50b78d4701 100644 --- a/src/intel/isl/isl.h +++ b/src/intel/isl/isl.h @@ -1308,6 +1308,15 @@ struct isl_surf_fill_state_info { union isl_color_value clear_color; /** + * Send only the clear value address + * + * If set, we only pass the clear address to the GPU and it will fetch it + * from wherever it is. + */ + bool use_clear_address; + uint64_t clear_address; + + /** * Surface write disables for gen4-5 */ isl_channel_mask_t write_disables; |