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authorAnuj Phogat <[email protected]>2019-01-24 14:46:02 -0800
committerAnuj Phogat <[email protected]>2019-03-19 14:42:19 -0700
commit2be60e0c73ed1555a919c5725cc0cab119a2b6de (patch)
treed983e195a83f07a0dd4c5338d8662bc5d0dea4e5 /src/intel/genxml
parent85ecd14ef6a084f5e82860de6dbc79870b335682 (diff)
anv/icl: Add WA_2204188704 to disable pixel shader panic dispatch
Signed-off-by: Anuj Phogat <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
Diffstat (limited to 'src/intel/genxml')
-rw-r--r--src/intel/genxml/gen11.xml5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index a7c06c5ab60..6f3aba46561 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -3681,4 +3681,9 @@
<field name="Enabled Texel Offset Precision Fix Mask" start="17" end="17" type="bool"/>
</register>
+ <register name="COMMON_SLICE_CHICKEN3" length="1" num="0x7304">
+ <field name="PS Thread Panic Dispatch" start="6" end="7" type="uint"/>
+ <field name="PS Thread Panic Dispatch Mask" start="22" end="23" type="uint"/>
+ </register>
+
</genxml>