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authorAnuj Phogat <[email protected]>2018-10-12 14:13:21 -0700
committerAnuj Phogat <[email protected]>2018-11-26 15:11:36 -0800
commit16e4911972754af49268a5014fc07f0a45a8e7af (patch)
treeebf911b5a1b82847de99b84200646ca8c47d0e7a /src/intel/genxml
parent3f55fd3814156b6384679bf4013ebabe53ccedde (diff)
anv/icl: Set use full ways in L3CNTLREG
L3 allocation table in h/w specification recommends using 4 KB granularity for programming allocation fields in L3CNTLREG. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/intel/genxml')
-rw-r--r--src/intel/genxml/gen11.xml1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index b975fe94776..1239ed011ed 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -3547,6 +3547,7 @@
<field name="SLM Enable" start="0" end="0" type="uint"/>
<field name="URB Allocation" start="1" end="7" type="uint"/>
<field name="Error Detection Behavior Control" start="9" end="9" type="bool"/>
+ <field name="Use Full Ways" start="10" end="10" type="bool"/>
<field name="RO Allocation" start="11" end="17" type="uint"/>
<field name="DC Allocation" start="18" end="24" type="uint"/>
<field name="All Allocation" start="25" end="31" type="uint"/>