diff options
| author | Rafael Antognolli <[email protected]> | 2019-04-24 13:05:20 -0700 |
|---|---|---|
| committer | Nanley Chery <[email protected]> | 2019-10-28 10:47:05 -0700 |
| commit | 43b48ee752eb733c7d3c4e3146c5ba1bdcec42a7 (patch) | |
| tree | 833e16c3f36443ad268b4a5479a6d9311ce90eda /src/intel/genxml | |
| parent | 07e16221d975bbc286e89bffadf60f36afcddb7f (diff) | |
intel/blorp/gen12: Set FWCC when storing the clear color.
From "Render Target Fast Clear" description for Gen12:
"SW must store clear color using MI_STORE_DATA_IMM with
ForceWriteCompletionCheck bit set."
From Instruction_MI_STORE_DATA_IMM, bitfield 10 (when set to 1):
"Following the last write from this command, Command Streamer
will wait for all previous writes are completed and in global
observable domain before moving to next command."
We use 4 SDIs to store the clear color (one per channel). From the
description, it looks to me that setting that flag only on the last SDI
should be enough.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/intel/genxml')
| -rw-r--r-- | src/intel/genxml/gen12.xml | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml index 41957adacf9..11f0d926466 100644 --- a/src/intel/genxml/gen12.xml +++ b/src/intel/genxml/gen12.xml @@ -6179,6 +6179,7 @@ <instruction name="MI_STORE_DATA_IMM" bias="2" length="4"> <field name="DWord Length" start="0" end="9" type="uint" default="2"/> + <field name="Force Write Completion Check " start="10" end="10" type="bool"/> <field name="Store Qword" start="21" end="21" type="uint"/> <field name="Use Global GTT" start="22" end="22" type="bool"/> <field name="MI Command Opcode" start="23" end="28" type="uint" default="32"/> |