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authorKenneth Graunke <[email protected]>2018-01-02 14:26:41 -0800
committerKenneth Graunke <[email protected]>2018-01-09 10:13:33 -0800
commit8eadc2fb8fe395ea0a8202217bd5545978962d1d (patch)
tree7797386a6773339af84f0ff951b446f73e013de4 /src/intel/genxml/gen75.xml
parent5e7d06fcb0c1f11373ff940670744486a467af93 (diff)
intel: Apply Geminilake "Barrier Mode" workaround.
Apparently, Geminilake requires you to whack a chicken bit to select either compute or tessellation mode for barriers. The recommendation is to switch between them at PIPELINE_SELECT time. We may not need to do this all the time, but I don't know that it hurts either. PIPELINE_SELECT is already a pretty giant stall. This appears to fix hangs in tessellation control shaders with barriers on Geminilake. Note that this requires a corresponding kernel change, drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake. in order for the register write to actually happen. Without an updated kernel, this register write will be noop'd and the fix will not work. Reviewed-by: Rafael Antognolli <[email protected]>
Diffstat (limited to 'src/intel/genxml/gen75.xml')
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