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authorLionel Landwerlin <[email protected]>2018-04-03 11:21:31 +0100
committerLionel Landwerlin <[email protected]>2018-04-03 16:55:53 +0100
commit4d591272130c2d285b87e7925f620fcefdc2305e (patch)
treee4226e3622ca6216942cef3c11b6c6305a126bcf /src/intel/genxml/gen7.xml
parent2841af6238b7648b388ba806f1ad181332b6eef0 (diff)
intel: genxml: decode variable length MI_LRI
MI_LOAD_REGISTER_IMM can load multiple (register, value) tuples in one command. In our drivers we only use one tuple at a time, but the kernel might load more than one at a time. Instead of making all the tuple part of a group, we leave out the first tuple (the one we use in the generated packing structures). This is particularly useful for looking at error stats generated by the kernel. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
Diffstat (limited to 'src/intel/genxml/gen7.xml')
-rw-r--r--src/intel/genxml/gen7.xml4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 4865843fcbb..baf42a7d32d 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -2020,6 +2020,10 @@
<field name="DWord Length" start="0" end="7" type="uint" default="1"/>
<field name="Register Offset" start="34" end="54" type="offset"/>
<field name="Data DWord" start="64" end="95" type="uint"/>
+ <group count="0" start="96" size="64">
+ <field name="Register Offset" start="2" end="22" type="offset"/>
+ <field name="Data DWord" start="32" end="63" type="uint"/>
+ </group>
</instruction>
<instruction name="MI_LOAD_REGISTER_MEM" bias="2" length="3">