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author | Jason Ekstrand <[email protected]> | 2018-11-12 18:48:10 -0600 |
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committer | Jason Ekstrand <[email protected]> | 2018-11-15 19:59:49 -0600 |
commit | 6339aba775ecdcaf74136479d02e3622bc1d4c0a (patch) | |
tree | bf3d0178ade3cccab3b89a19564a7418cc0dc070 /src/intel/dev | |
parent | d34fd81e7668b14158d63ade844a0e260b6f9152 (diff) |
intel/compiler: Lower SSBO and shared loads/stores in NIR
We have a bunch of code to do this in the back-end compiler but it's
fairly specific to typed surface messages and the way we emit them.
This breaks it out into NIR were it's easier to do things a bit more
generally. It also means we can easily share the code between the vec4
and FS back-ends if we wish.
Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
Diffstat (limited to 'src/intel/dev')
0 files changed, 0 insertions, 0 deletions