diff options
| author | Kenneth Graunke <[email protected]> | 2019-06-19 16:04:50 -0500 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2019-06-20 13:32:15 -0500 |
| commit | d4a4384b315a4b74357b30f868f4d1c25a571083 (patch) | |
| tree | c14800614d3bcc28eef9e31552057eea6b516926 /src/intel/dev/gen_debug.h | |
| parent | c378829a0df904c907d7070801fd89749053680f (diff) | |
iris: Implement INTEL_DEBUG=pc for pipe control logging.
This prints a log of every PIPE_CONTROL flush we emit, noting which bits
were set, and also the reason for the flush. That way we can see which
are caused by hardware workarounds, render-to-texture, buffer updates,
and so on. It should make it easier to determine whether we're doing
too many flushes and why.
Diffstat (limited to 'src/intel/dev/gen_debug.h')
| -rw-r--r-- | src/intel/dev/gen_debug.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/dev/gen_debug.h b/src/intel/dev/gen_debug.h index 07761143a7f..edd3f8a66ec 100644 --- a/src/intel/dev/gen_debug.h +++ b/src/intel/dev/gen_debug.h @@ -86,6 +86,7 @@ extern uint64_t INTEL_DEBUG; #define DEBUG_SOFT64 (1ull << 42) #define DEBUG_TCS_EIGHT_PATCH (1ull << 43) #define DEBUG_BT (1ull << 44) +#define DEBUG_PIPE_CONTROL (1ull << 45) /* These flags are not compatible with the disk shader cache */ #define DEBUG_DISK_CACHE_DISABLE_MASK DEBUG_SHADER_TIME |