diff options
| author | Caio Marcelo de Oliveira Filho <[email protected]> | 2020-05-27 08:05:41 -0700 |
|---|---|---|
| committer | Caio Marcelo de Oliveira Filho <[email protected]> | 2020-05-27 18:16:31 -0700 |
| commit | bccf2a25a89622c49dcfa488763c245e6584d568 (patch) | |
| tree | 42fa143185daaa360ef69c3dab1d976051257283 /src/intel/compiler | |
| parent | 78e400d4a515e8d8187259ed1287dd4671dee9ca (diff) | |
intel: Add helper to calculate GPGPU_WALKER::RightExecutionMask
Suggested by Jason.
Reviewed-by: Jason Ekstrand <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5142>
Diffstat (limited to 'src/intel/compiler')
| -rw-r--r-- | src/intel/compiler/brw_compiler.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index 95627db120a..963d8fa2fc8 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -1530,6 +1530,19 @@ brw_cs_simd_size_for_group_size(const struct gen_device_info *devinfo, unsigned group_size); /** + * Calculate the RightExecutionMask field used in GPGPU_WALKER. + */ +static inline unsigned +brw_cs_right_mask(unsigned group_size, unsigned simd_size) +{ + const uint32_t remainder = group_size & (simd_size - 1); + if (remainder > 0) + return ~0u >> (32 - remainder); + else + return ~0u >> (32 - simd_size); +} + +/** * Return true if the given shader stage is dispatched contiguously by the * relevant fixed function starting from channel 0 of the SIMD thread, which * implies that the dispatch mask of a thread can be assumed to have the form |