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authorJason Ekstrand <[email protected]>2018-05-18 20:04:12 -0700
committerJason Ekstrand <[email protected]>2018-05-22 09:53:23 -0700
commit417b9e5770436008a7f00cfaffe9ddf4c5a13502 (patch)
treede84b6a5bcf6cc2b3569e492fe9727519d31ed9e /src/intel/compiler
parentfe2edb25dd5628c395a65b60998f11e839d2b458 (diff)
intel/eu: Set EXECUTE_1 when setting the rounding mode in cr0
Fixes: d6cd14f2131a5b "i965/fs: Define new shader opcode to..." Reviewed-by: Jose Maria Casanova Crespo <[email protected]>
Diffstat (limited to 'src/intel/compiler')
-rw-r--r--src/intel/compiler/brw_eu_emit.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index ee5a048bcaa..6d81c636f27 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -3713,6 +3713,7 @@ brw_rounding_mode(struct brw_codegen *p,
if (bits != BRW_CR0_RND_MODE_MASK) {
brw_inst *inst = brw_AND(p, brw_cr0_reg(0), brw_cr0_reg(0),
brw_imm_ud(~BRW_CR0_RND_MODE_MASK));
+ brw_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1);
/* From the Skylake PRM, Volume 7, page 760:
* "Implementation Restriction on Register Access: When the control
@@ -3727,6 +3728,7 @@ brw_rounding_mode(struct brw_codegen *p,
if (bits) {
brw_inst *inst = brw_OR(p, brw_cr0_reg(0), brw_cr0_reg(0),
brw_imm_ud(bits));
+ brw_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1);
brw_inst_set_thread_control(p->devinfo, inst, BRW_THREAD_SWITCH);
}
}