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authorKenneth Graunke <[email protected]>2018-07-18 16:42:03 -0700
committerKenneth Graunke <[email protected]>2018-07-26 21:51:36 -0700
commit488972222c6454551ab1559f753c13a493dc513f (patch)
tree8a82f16349438be19eb29e611c961654b0010ff6 /src/intel/compiler
parent29dd5dda9d189eebb2d14de71e3fe30722e72743 (diff)
i965: Combine both gl_PatchVerticesIn lowering passes.
Until now, we had separate passes for lowering gl_PatchVerticesIn to a statically known constant (for TES inputs when linked against a TCS), and a uniform in the other cases. Annoyingly, one had to be run before nir_lower_system_values, and the other afterward. This simplified the passes, but made life painful for the callers. This patch combines both into a single pass. If you give it a non-zero static count, it uses that. If you give it Mesa state slots, it turns it back into a built-in uniform. Otherwise, it does nothing. This also moves the i965 uniform lowering out to shared code. v2: Make token arrays const. Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/intel/compiler')
-rw-r--r--src/intel/compiler/brw_nir.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h
index 7d82edafe46..00b61731526 100644
--- a/src/intel/compiler/brw_nir.h
+++ b/src/intel/compiler/brw_nir.h
@@ -144,8 +144,6 @@ void brw_nir_setup_arb_uniforms(void *mem_ctx, nir_shader *shader,
struct gl_program *prog,
struct brw_stage_prog_data *stage_prog_data);
-void brw_nir_lower_patch_vertices_in_to_uniform(nir_shader *nir);
-
void brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler,
nir_shader *nir,
const struct brw_vs_prog_key *vs_key,