diff options
| author | Jose Maria Casanova Crespo <[email protected]> | 2017-07-01 08:20:07 +0200 |
|---|---|---|
| committer | Jose Maria Casanova Crespo <[email protected]> | 2017-12-06 08:57:18 +0100 |
| commit | fa4a9d63bba57245bd9552990c92b48a9ed89b16 (patch) | |
| tree | 287b8ff2508632e1055d43459d97841a28fcdfab /src/intel/compiler | |
| parent | c57a3f200dd50e345a9983e5ae950091e6241af6 (diff) | |
i965/fs: Use byte scattered read for 16-bit load_ssbo
Used to enable 16-bit reads at do_untyped_vector_read, that is used on
the following intrinsics:
* nir_intrinsic_load_shared
* nir_intrinsic_load_ssbo
v2: Removed use of stride = 2 on 16-bit sources (Jason Ekstrand)
v3: - Add bitsize to scattered read operation (Jason Ekstrand)
- Remove implementation of 16-bit UBO read from this patch.
- Avoid assertion at opt_algebraic caused by ADD of two IMM with
offset with BRW_REGISTER_TYPE_UD type found on matrix tests.
(Jose Maria Casanova)
v4: (Jason Ekstrand)
- Put if case for 16-bits at the beginning of the if ladder.
- Use type_sz(dest.type) * 8 as bit_size parameter for scattered read.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/intel/compiler')
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 832821015fb..ae85834ffe6 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -2302,7 +2302,19 @@ do_untyped_vector_read(const fs_builder &bld, const fs_reg offset_reg, unsigned num_components) { - if (type_sz(dest.type) == 4) { + if (type_sz(dest.type) <= 2) { + fs_reg read_offset = bld.vgrf(BRW_REGISTER_TYPE_UD); + bld.MOV(read_offset, offset_reg); + for (unsigned i = 0; i < num_components; i++) { + fs_reg read_reg = + emit_byte_scattered_read(bld, surf_index, read_offset, + 1 /* dims */, 1, + type_sz(dest.type) * 8 /* bit_size */, + BRW_PREDICATE_NONE); + bld.MOV(offset(dest, bld, i), subscript(read_reg, dest.type, 0)); + bld.ADD(read_offset, read_offset, brw_imm_ud(type_sz(dest.type))); + } + } else if (type_sz(dest.type) == 4) { fs_reg read_result = emit_untyped_read(bld, surf_index, offset_reg, 1 /* dims */, num_components, |