diff options
| author | Anuj Phogat <[email protected]> | 2018-02-06 17:09:09 -0800 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2018-03-02 11:45:21 -0800 |
| commit | 56dc9f9f49638e0769d6bc696ff7f5dafccec9fc (patch) | |
| tree | 7e450a001d85ccb166f97e2e12a9f7b41949eb9c /src/intel/compiler | |
| parent | 4b4838b1ae46a0ce9fed88f275cc01167302cf24 (diff) | |
intel/compiler: Memory fence commit must always be enabled for gen10+
Commit bit in the message descriptor (Bit 13) must be always set
to true in CNL+ for memory fence messages. It also fixes a piglit
GPU hang on cnl+ in simulation environment.
Piglit test: arb_shader_image_load_store-shader-mem-barrier
See HSD ES # 1404612949
Signed-off-by: Anuj Phogat <[email protected]>
Cc: [email protected]
Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/intel/compiler')
| -rw-r--r-- | src/intel/compiler/brw_eu_emit.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 44abede16bc..f8102e014e5 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -3287,7 +3287,9 @@ brw_memory_fence(struct brw_codegen *p, struct brw_reg dst) { const struct gen_device_info *devinfo = p->devinfo; - const bool commit_enable = devinfo->gen == 7 && !devinfo->is_haswell; + const bool commit_enable = + devinfo->gen >= 10 || /* HSD ES # 1404612949 */ + (devinfo->gen == 7 && !devinfo->is_haswell); struct brw_inst *insn; brw_push_insn_state(p); |